An embodiment is a method including: attaching a first die to a first side of a first component using first electrical connectors, attaching a first side of a second die to first side of the first component using second electrical connectors, attaching a dummy die to the first side of the first component in a scribe line region of the first component, adhering a cover structure to a second side of the second die, and singulating the first component and the dummy die to form a package structure.

A semiconductor package for double sided cooling includes a first and a second carrier facing each other, at least one power semiconductor chip arranged between the first and second carriers, external contacts arranged at least partially between the first and second carriers, and spring elements arranged between the first and second carriers and configured to keep the first and second carriers at a predefined distance from each other.

A radio frequency module includes: a first power amplifier and a second power amplifier on a first principal surface of a module board; external-connection terminals on a second principal surface; and a first via-conductor and a second via-conductor apart from each other inside of the board. One end of the first via-conductor is connected to a ground electrode of the first power amplifier, and the other end is connected to a first external-connection terminal. One end of the second via-conductor is connected to a ground electrode of the second power amplifier, and the other end is connected to a second external-connection terminal. The second via-conductor penetrates the board in a normal direction of the first principal surface, and the first via-conductor includes columnar conductors cascaded with central axes thereof displaced in the normal direction and has no region where the columnar conductors overlap in a plan view of the board.

A device includes a substrate, and a plurality of dielectric layers over the substrate. A plurality of metallization layers is formed in the plurality of dielectric layers, wherein at least one of the plurality of metallization layers comprises a metal pad. A through-substrate via (TSV) extends from the top level of the plurality of the dielectric layers to a bottom surface of the substrate. A deep conductive via extends from the top level of the plurality of dielectric layers to land on the metal pad. A metal line is formed over the top level of the plurality of dielectric layers and interconnecting the TSV and the deep conductive via.

A semiconductor device module includes a package carrier having an opening, wherein in the opening there is disposed a semiconductor package including a semiconductor die, an encapsulant, and first vertical contacts, wherein the encapsulant at least partially covers the semiconductor die, and the first vertical contacts are connected to the semiconductor die and extend at least partially through the encapsulant, and a first outer metallic contact layer electrically connected to the first vertical contacts.

A semiconductor device includes a substrate having a first area and a second area and an active area limited by an isolation layer in the first area and the second area, a p-type gate electrode doped with p-type impurities and including a p-type lower gate layer and a p-type upper gate layer on the p-type lower gate layer with a first gate dielectric layer disposed between the active area and the p-type gate electrode in the first area, and an n-type gate electrode doped with n-type impurities and including an n-type lower gate layer and an n-type upper gate layer on the n-type lower gate layer with a second gate dielectric layer disposed between the active area and the n-type gate electrode in the second area.

A semiconductor package includes a semiconductor die, a redistribution structure and connective terminals. The redistribution structure is disposed on the semiconductor die and includes a first metallization tier disposed in between a pair of dielectric layers. The first metallization tier includes routing conductive traces electrically connected to the semiconductor die and a shielding plate electrically insulated from the semiconductor die. The connective terminals include dummy connective terminals and active connective terminals. The dummy connective terminals are disposed on the redistribution structure and are electrically connected to the shielding plate. The active connective terminals are disposed on the redistribution structure and are electrically connected to the routing conductive traces. Vertical projections of the dummy connective terminals fall on the shielding plate.

A memory device includes a cell stacked structure on a substrate, the cell stacked structure including insulation layers and gate patterns alternately stacked, a channel structure passing through the cell stacked structure, the channel structure extending in a vertical direction, a dummy structure on the substrate, the dummy structure being spaced apart from the cell stacked structure, and the dummy structure including insulation layers and metal patterns alternately stacked, a first through via contact passing through the dummy structure, the first through via contact extending in the vertical direction, and a first capping insulation pattern between a sidewall of the first through via contact and each of the metal patterns in the dummy structure, the first capping insulation pattern insulating the first through via contact from each of the metal patterns.

An embodiment is a structure including a first semiconductor device and a second semiconductor device, a first set of conductive connectors mechanically and electrically bonding the first semiconductor device and the second semiconductor device, a first underfill between the first and second semiconductor devices and surrounding the first set of conductive connectors, a first encapsulant on at least sidewalls of the first and second semiconductor devices and the first underfill, and a second set of conductive connectors electrically coupled to the first semiconductor device, the second set of conductive connectors being on an opposite side of the first semiconductor device as the first set of conductive connectors.

A radio frequency module includes: a module board including first and second principal surfaces; first and second power amplifiers on the first principal surface; external-connection terminals on the second principal surface; and first and second via conductors connecting the first and second principal surfaces. The first and second via conductors are spaced apart in the module board, one end of the first via conductor is connected to a first ground electrode of the first power amplifier, the other end of the first via conductor is connected to a first external-connection terminal, one end of the second via conductor is connected to a second ground electrode of the second power amplifier, the other end of the second via conductor is connected to a second external-connection terminal, and the first and second via conductors each penetrate through the module board in a direction normal to the first and second principal surfaces.