A method for forming a device package includes forming a molding compound around a plurality of dies and laminating a polymer layer over the dies. A top surface of the dies is covered by a film layer while the molding compound is formed, and the polymer layer extends laterally past edge portions of the dies. The method further includes forming a conductive via in the polymer layer, wherein the conductive via is electrically connected to a contact pad at a top surface of one of the dies.

An embodiment method for forming a semiconductor package includes attaching a first die to a first carrier, depositing a first isolation material around the first die, and after depositing the first isolation material, bonding a second die to the first die. Bonding the second die to the first die includes forming a dielectric-to-dielectric bond. The method further includes removing the first carrier and forming fan-out redistribution layers (RDLs) on an opposing side of the first die as the second die. The fan-out RDLs are electrically connected to the first die and the second die.

A method for applying a bonding layer that is comprised of a basic layer and a protective layer on a substrate with the following method steps: application of an oxidizable basic material as a basic layer on a bonding side of the substrate, at least partial covering of the basic layer with a protective material that is at least partially dissolvable in the basic material as a protective layer. In addition, the invention relates to a corresponding substrate.

In an aspect, a system and method for assembling a semiconductor device on a receiving surface of a destination substrate is disclosed. In another aspect, a system and method for assembling a semiconductor device on a destination substrate with topographic features is disclosed. In another aspect, a gravity-assisted separation system and method for printing semiconductor device is disclosed. In another aspect, various features of a transfer device for printing semiconductor devices are disclosed.

An embodiment method for forming a semiconductor device package comprises bonding a first die to a package substrate and forming a molding compound over the package substrate and around the first die. A surface of the first die opposing the package substrate is exposed after forming the molding compound. The method further comprises bonding a plurality of second dies to the surface of the first die opposing the package substrate after forming the molding compound.

A converter includes a plurality of active circuitry elements over a substrate. The converter further includes a passivation structure over the plurality of active circuitry elements, the passivation structure having at least one opening that is configured to expose at least one electrical pad of each active circuitry element. The converter further includes a plurality of passive electrical components over the passivation structure, wherein each passive electrical component is selectively connectable with at least one other passive electrical component, and a first side of each passive electrical component is electrically coupled to an electrical pad of each of at least two active circuitry elements. The converter further includes a plurality of electrical connection structures, wherein a first electrical connection structure electrically couples an electrical pad of a first active circuitry element to a corresponding passive electrical component, and the first electrical connection structure is completely within the passivation structure.

Provided is an optical element, in which: an internal wiring portion electrically connects a first contact electrode portion and a second contact electrode portion to each other; a second region, an active layer and a second conductive semiconductor layer form a mesa structure; a pad electrode is placed so as to cover a plurality of unit elements, and is electrically connected to at least one of the first contact electrode portion and the second contact electrode portion; a first insulating portion is placed between the pad electrode and a first region of a side surface of a mesa structure and a first conductive semiconductor layer; and a diameter of a circle circumscribed to a region where the pad electrode and a connection portion are in contact with each other is 15% or more of a length of a short side of a substrate.

In an aspect, a system and method for assembling a semiconductor device on a receiving surface of a destination substrate is disclosed. In another aspect, a system and method for assembling a semiconductor device on a destination substrate with topographic features is disclosed. In another aspect, a gravity-assisted separation system and method for printing semiconductor device is disclosed. In another aspect, various features of a transfer device for printing semiconductor devices are disclosed.

An under bump metallurgy (UBM) and redistribution layer (RDL) routing structure includes an RDL formed over a die. The RDL comprises a first conductive portion and a second conductive portion. The first conductive portion and the second conductive portion are at a same level in the RDL. The first conductive portion of the RDL is separated from the second conductive portion of the RDL by insulating material of the RDL. A UBM layer is formed over the RDL. The UBM layer includes a conductive UBM trace and a conductive UBM pad. The UBM trace electrically couples the first conductive portion of the RDL to the second conductive portion of the RDL. The UBM pad is electrically coupled to the second conductive portion of the RDL. A conductive connector is formed over and electrically coupled to the UBM pad.

An optical element includes a substrate, unit elements, an internal wiring portion, a pad electrode and a first insulating portion. The unit elements have first and second conductive semiconductor layers, an active layer and first and second contact electrode portions. The internal wiring portion electrically connects the first and second contact electrode portions. The second region, the active layer and the second conductive semiconductor layer form a mesa structure. The pad electrode is electrically connected to the first and second contact electrode portions. The optical element has a connection portion electrically connected to an outside and the pad electrode. The first insulating portion is placed between the internal wiring portion and the connection portion. A diameter of a circle inscribed to a region where the pad electrode and the connection portion contact with each other is 15% or more of a length of a short side of the substrate.