A compound semiconductor device includes a heterojunction bipolar transistor and a bump. The heterojunction bipolar transistor includes a plurality of unit transistors. The bump is electrically connected to emitters of the plurality of unit transistors. The plurality of unit transistors are arranged in a first direction. The bump is disposed above the emitters of the plurality of unit transistors while extending in the first direction. The emitter of at least one of the plurality of unit transistors is displaced from a center line of the bump in the first direction toward a first side of a second direction which is perpendicular to the first direction. The emitter of at least another one of the plurality of unit transistors is displaced from the center line of the bump in the first direction toward a second side of the second direction.

Transistors including semiconductor regions where operating current flows are provided above a substrate. Operating electrodes of conductive material having thermal conductivity higher than the semiconductor regions and contacting the semiconductor regions to conduct operating current to the semiconductor regions are disposed. A conductor pillar for external connection contains contact regions where the semiconductor regions and the operating electrodes contact, and is electrically connected to the operating electrodes. The contact regions are disposed in a first direction. Each contact region has a planar shape long in a second direction orthogonal to the first direction. A first average distance, obtained by averaging distances in the second direction from each end portion of the contact region in the second direction to an edge of the conductor pillar across the contact regions, exceeds an average distance value in a height direction from the contact region to a top surface of the conductor pillar.

A circuit element is formed on a substrate made of a compound semiconductor. A bonding pad is disposed on the circuit element so as to at least partially overlap the circuit element. The bonding pad includes a first metal film and a second metal film formed on the first metal film. A metal material of the second metal film has a higher Young's modulus than a metal material of the first metal film.

A semiconductor device includes an HBT; emitter wiring which is connected to an emitter electrode of the HBT and covers the HBT; a passivation film having an opening on the HBT in plan view; a UBM layer which is connected to the emitter wiring through the opening and made of a refractory metal with a thickness of 300 nm or more; and a pillar bump which is arranged on the UBM layer and includes a metal post and a solder layer. The UBM layer serves as a stress relaxation layer, thereby relaxing stress on the HBT due to a difference in thermal expansion coefficient between a GaAs-based material of each layer constituting the HBT and the pillar bump.

A bipolar transistor includes a collector layer, a base layer, and an emitter layer that are formed in this order on a compound semiconductor substrate. The emitter layer is disposed inside an edge of the base layer in plan view. A base electrode is disposed on partial regions of the emitter layer and the base layer so as to extend from an inside of the emitter layer to an outside of the base layer in plan view. An insulating film is disposed between the base electrode and a portion of the base layer, with the portion not overlapping the emitter layer. An alloy layer extends from the base electrode through the emitter layer in a thickness direction and reaches the base layer. The alloy layer contains at least one element constituting the base electrode and elements constituting the emitter layer and the base layer.

A semiconductor device includes the following elements. A chip has a main surface substantially parallel with a plane defined by first and second directions intersecting with each other. A power amplifier amplifies an input signal and outputs an amplified signal from plural output terminals. First and second filter circuits attenuate harmonics of the amplified signal. The first filter circuit includes a first capacitor connected between the plural output terminals and a ground. The second filter circuit includes a second capacitor connected between the plural output terminals and a ground. On the main surface of the chip, the plural output terminals are disposed side by side in the first direction, and the first capacitor is disposed on a side in the first direction with respect to the plural output terminals, while the second capacitor is disposed on a side opposite the first direction with respect to the plural output terminals.

Methods of manufacturing a heterojunction bipolar transistor are described herein. An exemplary method can include providing a base/emitter stack, the base/emitter stack comprising a substrate, an etch stop layer over the substrate, an emitter contact layer over the etch stop layer, an emitter over the emitter contact layer, and/or a base over the emitter. The exemplary method further can include forming a collector. The exemplary method also can include wafer bonding the base to the collector. Other embodiments are also disclosed herein.

This invention minimizes the thermal resistance and maximizes the power density of a power transistor by mounting the transistor in flip-chip fashion on a heat sink/heat spreader and conducting the heat from the active semiconductor layer through the heat sink/heat spreader (as opposed to through the low conductivity substrate). Illustratively, the semiconductor device package comprises: a high electron mobility transistor (HEMT) formed in a layer of Gallium Nitride (GaN) having a first major surface; at least one metal contact pad making thermal contact with the layer of GaN on its first major surface; a heat sink/heat spreader in electrical and thermal contact with the contact pad(s) on the first surface; and a substrate on which the heat sink is mounted.

A circuit element is formed on a substrate made of a compound semiconductor. A bonding pad is disposed on the circuit element so as to at least partially overlap the circuit element. The bonding pad includes a first metal film and a second metal film formed on the first metal film. A metal material of the second metal film has a higher Young's modulus than a metal material of the first metal film.

A transistor includes a semiconductor region provided on a substrate and three different terminal electrodes. At least one terminal electrode has an isolated electrode structure composed of a plurality of conductor patterns. A bump, which electrically connects the plurality of conductor patterns to each other, is arranged on the terminal electrode having the isolated electrode structure. A stress-relaxing layer, which is composed of a metal material containing a high-melting-point metal, is arranged between the semiconductor region of the transistor and the bump. No current path for connecting the plurality of conductor patterns to each other is arranged between the conductor patterns and the bump.