Patent classifications
H01L2924/13069
Bump structure, display device including a bump structure, and method of manufacturing a bump structure
A bump structure includes a first bump disposed on a substrate, the first bump including a first metal, at least one antioxidant member surrounded by the first bump, the at least one antioxidant member including a second metal having an ionization tendency greater than an ionization tendency of the first metal, and a second bump disposed on the first bump and the at least one antioxidant member.
Hybrid element and method of fabricating the same
Provided is a method of fabricating a hybrid element, the method including forming a plurality of first elements on a first substrate, separating a plurality of second elements grown on a second substrate from the second substrate, a material of the second substrate being different from a material of the first substrate, and transferring the plurality of second elements, separated from the second substrate, onto the first substrate, wherein, in the transferring, the plurality of second elements are spaced apart from each other by a fluidic self-assembly method, and wherein each of the plurality of second elements includes a shuttle layer grown on the second substrate, an element layer grown on the shuttle layer, and an electrode layer on the element layer.
Semiconductor device and manufacturing method thereof
An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor layer is used for the transistors. An intrinsic or substantially intrinsic semiconductor from which an impurity which is to be an electron donor (donor) is removed from an oxide semiconductor and which has a larger energy gap than a silicon semiconductor is used. Electrical characteristics of the transistors can be controlled by controlling the potential of a pair of conductive films which are provided on opposite sides from each other with respect to the oxide semiconductor layer, each with an insulating film arranged therebetween, so that the position of a channel formed in the oxide semiconductor layer is determined.
Semiconductor devices with integrated thin-film transistor circuitry
Various embodiments include a semiconductor device with thin-film transistor (TFT) circuitry monolithically integrated with other non-TFT functional devices. One example is an integrated LED display panel, in which an array of LEDs is integrated with corresponding TFT driver circuitry. The TFT driver circuitry typically is an array of pixel drivers that drive the LEDs.
METHOD FOR MANUFACTURING THIN FILM TRANSISTOR
Disclosed is a method for manufacturing a thin film transistor. The method includes steps of etching a second metal layer and a semiconductor layer to form a boundary region of a thin film transistor; etching the second metal layer again to form a source, a drain and a back channel region of the thin film transistor; removing residual photoresist via an ashing procedure; and etching the semiconductor layer again to form a conductive channel of the thin film transistor. According to the method, the electric leakage problem of thin film transistor due to diffusion of copper and contamination of organic stripping liquid can be eliminated.
Projection display system
A light-emitting diode (LED) projector includes an LED display panel and a projection lens arranged in front of LED display panel and configured to collect and project light emitted by the LED display panel. The LED display panel includes an LED panel and a micro lens array arranged over the LED panel. The LED panel includes a substrate, a driver circuit array on the substrate and including a plurality of pixel driver circuits arranged in an array, and an LED array including a plurality of LED dies each being coupled to one of the pixel driver circuits. The micro lens array includes a plurality of micro lenses each corresponding to and being arranged over at least one of the LED dies.
Semiconductor device and manufacturing method of the same
An insulating film provided between adjacent pixels is referred to as a bank, a partition, a barrier, an embankment or the like, and is provided above a source wiring or a drain wiring for a thin film transistor, or a power supply line. In particular, at an intersection portion of these wirings provided in different layers, a larger step is formed there than in other portions. Even when the insulating film provided between adjacent pixels is formed by a coating method, thin portions are problematically partially formed due to this step and the withstand pressure is reduced. In the present invention, a dummy material is arranged near the large step portion, particularly, around the intersection portion of wirings, so as to alleviate unevenness formed thereover. The upper wiring and the lower wiring are arranged in a misaligned manner so as not to align the end portions.
THIN FILM TRANSISTOR AND DISPLAY SUBSTRATE HAVING THE SAME
A display substrate including a base substrate, a first thin film transistor disposed on the base substrate and including a first gate electrode and a first semiconductor active layer; a second thin film transistor electrically connected to the first thin film transistor, the second thin film transistor including a second gate electrode and a second semiconductor active layer; and an organic light emitting device electrically connected to the second thin film transistor. The first semiconductor active layer includes a first material and the second semiconductor active layer includes a second material different from the first material.
HYBRID ELEMENT AND METHOD OF FABRICATING THE SAME
Provided is a method of fabricating a hybrid element, the method including forming a plurality of first elements on a first substrate, separating a plurality of second elements grown on a second substrate from the second substrate, a material of the second substrate being different from a material of the first substrate, and transferring the plurality of second elements, separated from the second substrate, onto the first substrate, wherein, in the transferring, the plurality of second elements are spaced apart from each other by a fluidic self-assembly method, and wherein each of the plurality of second elements includes a shuttle layer grown on the second substrate, an element layer grown on the shuttle layer, and an electrode layer on the element layer.
DISPLAY DEVICES AND METHODS FOR FORMING THE SAME
A display device is provided. The display device includes a first conductive pad disposed on a substrate, wherein the first conductive pad has a contact area that is adjacent to the substrate. The display device also includes a first bonding material disposed on the first conductive pad, wherein the first bonding material has a sectional area that is parallel to a surface of the substrate. The display device further includes a second conductive pad disposed on the first bonding material, and a first illumination structure disposed on the second conductive pad, wherein the sectional area of the first bonding material is smaller than the contact area of the first conductive pad.