A PoP semiconductor device has a top semiconductor package disposed over a bottom semiconductor package. The top semiconductor package has a substrate and a first semiconductor die disposed over the substrate. First and second encapsulants are deposited over the first semiconductor die and substrate. A first build-up interconnect structure is formed over the substrate after depositing the second encapsulant. The top package is disposed over the bottom package. The bottom package has a second semiconductor die and modular interconnect units disposed around the second semiconductor die. A second build-up interconnect structure is formed over the second semiconductor die and modular interconnect unit. The modular interconnect units include a plurality of conductive vias and a plurality of contact pads electrically connected to the conductive vias. The I/O pattern of the build-up interconnect structure on the top semiconductor package is designed to coincide with the I/O pattern of the modular interconnect units.

Field-effect transistor (FET) devices are described herein that include one or more body contacts implemented near source, gate, drain (S/G/D) assemblies to improve the influence of a voltage applied at the body contact on the S/G/D assemblies. For example, body contacts can be implemented between S/G/D assemblies rather than on the ends of such assemblies. This can advantageously improve body contact influence on the S/G/D assemblies while maintaining a targeted size for the FET device.

Systems and methods for thermal management for high power density EMI shielded electronic devices. In one embodiment, an electronic module comprises: a circuit board; at least one integrated circuit mounted to the circuit board; at least one electro-magnetic interference (EMI) shield fence mounted to the circuit board, wherein the at least one integrated circuit is mounted within a perimeter defined by the EMI shield fence; a heatsink EMI shield lid secured onto the at least one EMI shield fence, wherein the heatsink EMI shield lid seals the at least one integrated circuit within the at least one EMI shield fence; wherein the heatsink EMI shield lid comprises a spring loaded thermal interface in conductive thermal contact with the at least one integrated circuit.

A joined structure which is configured such that a space between adjacent substrates is filled with a filling material. The joined structure includes a first substrate having a first conductor formed on a surface of the first substrate, a second substrate having a second conductor formed on a surface of the second substrate, arranged so that a surface of the first substrate faces a surface of the second substrate, a connecting conductor which electrically connects the first conductor and the second conductor, and a filling material between the first substrate and the second substrate. The filling material is formed into such a shape that a space is provided which corresponds to at least one of the first conductor, the second and the connecting conductor.

An electronic device module includes a first board including a first side and a second side facing in opposite directions, the first side of the first board being configured to have a first electronic device mounted thereon; a second board adhered to the second side of the first board, and including a device accommodating portion that is a space formed by removing a central portion of the second board; a second electronic device disposed in the device accommodating portion and mounted on the second side of the first board so that the second electronic device is adjacent to an internal edge side of the second board defining a boundary of the device accommodating portion; and a bonding layer disposed in a gap between the first board and the second board and extending into a gap between the second side of the first board and the second electronic device, the bonding layer bonding the second board and the second electronic device to the first board.

An integrated radio frequency (RF) circuit structure may include an active device on a first surface of an isolation layer. The integrated RF circuit structure may also include backside metallization on a second surface opposite the first surface of the isolation layer. A body of the active device is biased by the backside metallization. The integrated RF circuit structure may further include front-side metallization coupled to the backside metallization with a via. The front-side metallization is arranged distal from the backside metallization. The front-side metallization, the via, and the backside metallization may at least partially enclose the active device.

An integrated radio frequency (RF) circuit structure may include an active device on a first surface of an isolation layer. The integrated RF circuit structure may also include backside metallization on a second surface opposite the first surface of the isolation layer. A body of the active device is biased by the backside metallization. The integrated RF circuit structure may further include front-side metallization coupled to the backside metallization with a via. The front-side metallization is arranged distal from the backside metallization. The front-side metallization, the via, and the backside metallization may at least partially enclose the active device.

Disclosed herein are methods of fabricating a packaged radio-frequency (RF) device. The disclosed methods use a film during fabrication to control the distribution of an under-fill material between one or more components and a packaging substrate. The method includes mounting components to a first side of a packaging substrate and applying a film to a second side of a packaging substrate. The method also includes mounting a lower component to the second side of the packaging substrate and under-filling the lower component mounted on the second side of the packaging substrate with an under-filling agent. The method also includes removing the film on the second side of the packaging substrate and mounting solder balls to the second side of the packaging substrate after removal of the film.

A semiconductor package is provided. The semiconductor package includes a carrier substrate having opposite first surface and second surface, and a chip stack disposed on the first surface of the carrier substrate. The chip stack includes a first semiconductor die, a second semiconductor die, and an interposer between the first semiconductor die and the second semiconductor die. The interposer transmits signals between the first semiconductor die and the second semiconductor die.

A radio frequency module includes a plurality of insulating base material layers made of a thermoplastic resin defining a multilayer circuit board and including a cavity inside thereof, an IC chip disposed in the cavity and including a noise generation source, and planar ground conductive bodies provided in the multilayer circuit board. The planar ground conductive bodies are disposed on a layer not exposed to the inner surface of the cavity, and include inter-layer connection conductive bodies protruding in the direction of the noise generation source from the planar ground conductive bodies.