Provided is a method of manufacturing a semiconductor having a double-sided substrate including preparing a first substrate on which a specific pattern is formed to enable electrical connection, preparing at least one semiconductor chip bonded to a metal post, bonding the at least one semiconductor chip to the first substrate, bonding a second substrate to the metal post, forming a package housing by packaging the first substrate and the second substrate to expose a lead frame, and forming terminal leads toward the outside of the package housing. Accordingly, the semiconductor chip and the metal post are previously joined to each other and are respectively bonded to the first substrate and the second substrate so that damage generated while bonding the semiconductor chip may be minimized and electrical properties and reliability of the semiconductor chip may be improved.

The present invention relates to a three-dimensional integrated package device for a high-voltage silicon carbide power module, comprising a source substrate, first chip submodules, a first driving terminal, a first driving substrate, a ceramic housing, a metal substrate, a water inlet, a water outlet, second chip submodules, a second driving terminal, a second driving substrate and a drain substrate from top to bottom; and each first chip submodule is composed of a driving connection substrate, a power source metal block, a first driving gate metal post, second driving gate metal posts, a silicon carbide bare chip, an insulation structure and the like. A three-dimensional integrated half-bridge structure is adopted to greatly reduce corresponding parasitic parameters.

Power semiconductor module, including a base plate with at least one substrate located on the base plate, wherein an electronic circuit is provided on the at least one substrate, wherein located on the at least one substrate are electrical connectors comprising a DC+ power terminal, a DC− power terminal and an AC power terminal and further a control connector, wherein the power semiconductor module is designed as a half-bridge module including a first amount of switching power semiconductor devices and a second amount of switching power semiconductor devices, wherein the base plate includes a contact area, a first device area and a second device area, wherein the contact area is positioned in a center of the base plate such, that the first device area is positioned at a first side of the contact area and that the second device area is positioned at a second side of the contact area, the second side being arranged opposite to the first side, wherein the DC+ power terminal, the DC− power terminal, the AC power terminal and the control connector are positioned in the contact area, wherein the first amount of switching power semiconductor devices is positioned in the first device area and wherein the second amount of switching power semiconductor devices is positioned in the second device area, wherein all the power semiconductor devices in the first device area are located in two parallel lines being aligned parallel to the width of the base plate and wherein all the power semiconductor devices in the second device area are located in two parallel lines being aligned parallel to the width of the base plate.

A power conversion device includes first and second power semiconductor elements, and a circuit for transferring a drive signal of the first and second power semiconductor elements. The circuit board includes a first emitter wire which is formed along an arranging direction of the first power semiconductor element and the second power semiconductor element, a first gate wire which is disposed between the first power semiconductor element and the first emitter wire, a second gate wire which is disposed between the second power semiconductor element and the emitter wire, a third gate wire which is disposed to face the first gate wire and the second gate wire with the emitter wire interposed between the third gate wire and the first gate wire and the second gate wire, and a first gate resistor which connects the first gate wire and the third gate wire over the first emitter wire.

An object of the present disclosure is to provide a semiconductor device capable of confirming withstand voltage of a snubber circuit after providing the snubber circuit and a method of manufacturing the semiconductor device. A semiconductor device according to the present disclosure includes: an insulating substrate; a circuit patterns provided on the insulating substrate; a snubber circuit substrate provided on the insulating substrate separately from the circuit patterns; a resistance provided on one of the circuit patterns and the snubber circuit substrate; a capacitor provided on another one of the circuit patterns and the snubber circuit substrate; and at least one semiconductor element electrically connected to the resistance and the capacitor.

A semiconductor package comprises a lead frame, a first field-effect transistor (FET), a second low side FET, a first high side FET, a second high side FET, a first metal clip, a second metal clip, and a molding encapsulation. The semiconductor package further comprises an optional integrated circuit (IC) controller or an optional inductor. A method for fabricating a semiconductor package. The method comprises the steps of providing a lead frame; attaching a first low side FET, a second low side FET, a first high side FET, and a second high side FET to the lead frame; mounting a first metal clip and a second metal clip; forming a molding encapsulation; and applying a singulation process.

A die can be applied to a front conductive layer. Openings can be formed in the conductive layer over contact points on the die. The openings can be filled with a conductive material to electrically couple the conductive layer to the contact points on the die. The front conductive layer can be etched to form a first conductive pattern. Conductive standoffs can be formed on portions of the front conductive layer. An additional front conductive layer can be laminated onto the front side. Openings can be formed in the additional front conductive layer over the standoffs. The openings can be filled with a conductive material to electrically couple the additional conductive layer to the underlying standoffs. The additional conductive layer can be etched to form a second conductive pattern.

A power semiconductor module includes a half-bridge circuit having a first power semiconductor element and a second power semiconductor element that are connected in series with each other. The power semiconductor module also includes first to third external terminals, a first wiring member that connects a high-potential-side main electrode of the first power semiconductor element to the first external terminal, a second wiring member that connects a low-potential-side main electrode of the second power semiconductor element to the second external terminal, a third wiring member that connects an output of the half-bridge circuit to a third external terminal, and at least one of a first corrosion sensor disposed in an installation environment of the first wiring member, a second corrosion sensor disposed in an installation environment of the second wiring member, or a third corrosion sensor disposed in an installation environment of the third wiring member.

The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, a mounting layer, switching elements, a moisture-resistant layer and a sealing resin. The substrate has a front surface facing in a thickness direction. The mounting layer is electrically conductive and disposed on the front surface. Each switching element includes an element front surface facing in the same direction in which the front surface faces along the thickness direction, a back surface facing in the opposite direction of the element front surface, and a side surface connected to the element front surface and the back surface. The switching elements are electrically bonded to the mounting layer with their back surfaces facing the front surface. The moisture-resistant layer covers at least one side surface. The sealing resin covers the switching elements and the moisture-resistant layer. The moisture-resistant layer is held in contact with the mounting layer and the side surface so as to be spanned between the mounting layer and the side surface in the thickness direction.

In one general aspect, a package can include a first submodule including a first semiconductor die coupled to a first substrate and a first spacer, and disposed between the first spacer and the first substrate. The first submodule includes a second spacer disposed lateral to the first semiconductor die. The package includes a second submodule including a second semiconductor die coupled to a second substrate and a third spacer, and disposed between the third spacer and the second substrate. The second submodule includes a fourth spacer disposed lateral to the second semiconductor die. The package includes an inter-module layer disposed between the first submodule and the second submodule. The first spacer of the first submodule is electrically coupled to the fourth spacer of the second-submodule via the inter-module layer. The second spacer of the first submodule is electrically coupled to the third spacer of the second-submodule via the inter-module layer.