A sensor array may include a plurality of sensors coupled with a flexible substrate. Each sensor may include a sensor die that generates an analog signal based on sensing, and a converter die that performs analog-to-digital conversion (ADC) of the analog signal to generate a digital output. The flexible substrate may include electrical interconnect to transmit digital outputs from sensors of the plurality of sensors. The flexible substrate may include strain relief cutouts between the sensors to enable deformation of the sensor array. Other aspects are also described and claimed.

A power distribution device includes a substrate, a first chip, a first bump, a second bump and a first capacitor. The first chip is configured to receive a first reference voltage signal and a second reference voltage signal. The first bump is located between the substrate and the first chip, and configured to transmit the first reference voltage signal from the substrate to the first chip. The second bump is located between the substrate and the first chip, and configured to transmit the second reference voltage signal from the substrate to the first chip. The first capacitor is located above the substrate and below the first chip. A first terminal of the first capacitor is coupled to the first bump, and a second terminal of the first capacitor is coupled to the second bump. A power distribution system is also disclosed herein.

An integrated circuit package includes a lead frame and an encapsulation that substantially encloses the lead frame. The lead frame further includes a first conductor comprising a first conductive loop and a second conductor galvanically isolated from the first conductor, proximate to and magnetically coupled to the first conductive loop to provide a communication link between the first and second conductor. The second conductor includes a first conductive portion, a second conductive portion, and a wire coupling together the first conductive portion and the second conductive portion.

A semiconductor device includes a plurality of resistive films arranged on an interlayer dielectric film. Each of the plurality of resistive films extends in a first direction in plan view. The plurality of resistive films are arranged spaced apart in a second direction orthogonal to the first direction in plan view. The plurality of resistive films are divided into a first group, a second group, and a third group. The first group is located between the second group and the third group in the second direction. A second width variation amount of each of the plurality of second resistive films belonging to the second group and a third width variation amount of each of the plurality of third resistive films belonging to the third group are larger than a first width variation amount of each of the plurality of first resistive films belonging to the first group.