Patent classifications
H01L2924/15156
ELECTRONIC COMPONENT MOUNTING PACKAGE AND ELECTRONIC DEVICE
An electronic component mounting package and an electronic device provide improved reliability. An electronic component mounting package includes a heat sink having a mount area in its middle, on which an electronic component is mountable, a frame installed on the heat sink to surround the mount area, a bond joining the heat sink and the frame together, and lead terminals installed on the upper surface of the frame to extend outward from the frame. The heat sink includes a metal, and includes a first portion having the mount area and a second portion thinner than the first portion. The second portion has a metallic crystal with a crystal grain size smaller than a crystal grain size of a metallic crystal of the first portion in a heat-sink thickness direction.
Automatic registration between circuit dies and interconnects
- Ankit Mahajan ,
- Mikhail L. Pekurovsky ,
- Matthew S. Stay ,
- Daniel J. Theis ,
- Ann M. Gilman ,
- Shawn C. Dodds ,
- Thomas J. Metzler ,
- Matthew R. D. Smith ,
- Roger W. Barton ,
- Joseph E. Hernandez ,
- Saagar A. Shah ,
- Kara A. Meyers ,
- James Zhu ,
- Teresa M. Goeddel ,
- Lyudmila A. Pekurovsky ,
- Jonathan W. Kemling ,
- Jeremy K. Larsen ,
- Jessica Chiu ,
- Kayla C. Niccum
Processes for automatic registration between a solid circuit die and electrically conductive interconnects, and articles or devices made by the same are provided. The solid circuit die is disposed on a substrate with contact pads aligned with channels on the substrate. Electrically conductive traces are formed by flowing a conductive liquid in the channels toward the contact pads to obtain the automatic registration.
PACKAGE COMPRISING A DIE AND DIE SIDE REDISTRIBUTION LAYERS (RDL)
A package that includes a second redistribution portion, a die coupled to the second redistribution portion, an encapsulation layer encapsulating the die, and a first redistribution portion coupled to the second redistribution portion. The first redistribution portion is located laterally to the die. The first redistribution portion is located over the second redistribution portion. The first redistribution portion and the second redistribution portion are configured to provide one or more electrical paths for the die.
Fan-out semiconductor package
A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads, an active surface on which the connection pads are disposed, and an inactive surface opposing the active surface, and disposed in the recess portion so that the inactive surface is connected to the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers of the frame and the connection pads of the semiconductor chip to each other, wherein the stopper layer includes an insulating material.
ORGANIC CIRCUIT CARRIER AND APPLICATION THEREOF IN POWER CONVERTERS AND IN VEHICLES
An organic circuit carrier including an organic insulation layer and at least one metallization layer arranged on an upper side, a lower side, or the upper side and the lower side of the organic insulation layer is provided. Side surfaces of the at least one metallization layer are embodied in a convexly curved fashion. A circuit arrangement and a power converter including such an organic circuit carrier are also provided. A vehicle such as an aircraft, including such a power converter, is also provided.
ANTENNA MODULE
An antenna module includes an antenna substrate, a first semiconductor package, disposed on the antenna substrate, including a first connection member including one or more first redistribution layers, electrically connected to the antenna substrate, and a first semiconductor chip disposed on the first connection member, and a second semiconductor package, disposed on the antenna substrate to be spaced apart from the first semiconductor package, including a second connection member including one or more second redistribution layers, electrically connected to the antenna substrate, and a second semiconductor chip disposed on the second connection member. The first semiconductor chip and the second semiconductor chip are different types of semiconductor chips.
Semiconductor device package and method of manufacturing the same
A semiconductor device package includes a transparent substrate, a photo detector and a first conductive layer. The transparent substrate has a first surface and a first cavity underneath the first surface. The photo detector is disposed within the first cavity. The photo detector has a sensing area facing toward a bottom surface of the first cavity of the transparent substrate. The first conductive layer is disposed over the transparent substrate and electrically connected to the photo detector.
PACKAGE STRUCTURE WITH CAVITY SUBSTRATE AND METHOD FOR FORMING THE SAME
A package structure is provided. The package structure includes a substrate having a first surface and a second surface opposite the first surface. The substrate includes a cavity extending from the second surface toward the first surface, and thermal vias extending from a bottom surface of the cavity to the first surface. The package structure also includes at least one electronic device formed in the cavity and thermally coupled to the thermal vias. In addition, the package structure includes an insulating layer formed over the second surface and covering the first electronic device. The insulating layer includes a redistribution layer (RDL) structure electrically connected to the electronic device. The package structure also includes an encapsulating material formed in the cavity, extending along sidewalls of the electronic device and between the electronic device and the insulating layer.
DIELECTRIC FILLER MATERIAL IN CONDUCTIVE MATERIAL THAT FUNCTIONS AS FIDUCIAL FOR AN ELECTRONIC DEVICE
An electronic device includes a substrate, and the substrate may include one or more layers. The one or more layers may include a dielectric material and may include one or more electrical traces. The electronic device may include a layer of conductive material, and the layer of conductive material may define a void in the conductive material. The electronic device may include a fiducial mark, and the fiducial mark may include a filler material positioned in the void defined by the conductive material. The fiducial mark may be coupled to the layer of conductive material. The filler material may have a lower reflectivity in comparison to the conductive material, for instance to provide a contrast with the conductive material.
Die carrier package and method of forming same
Various embodiments of a die carrier package and a method of forming such package are disclosed. The package includes one or more dies disposed within a cavity of a carrier substrate, where a first die contact of one or more of the dies is electrically connected to a first die pad disposed on a recessed surface of the cavity, and a second die contact of one or more of the dies is electrically connected to a second die pad also disposed on the recessed surface. The first and second die pads are electrically connected to first and second package contacts respectively. The first and second package contacts are disposed on a first major surface of the carrier substrate adjacent the cavity.