Patent classifications
H01L2924/15747
Packaged multichip module with conductive connectors
In a described example, a packaged device includes a substrate having a device mounting surface including a first layer of conductive material having a first thickness less than a substrate thickness, the substrate having a second layer of the conductive material having a second thickness less than the substrate thickness. A first semiconductor device is mounted to a first area of the device mounting surface; and a second semiconductor device is mounted to a second area on the device mounting surface and spaced from the first semiconductor device. At least two connectors are formed of the first layer of the substrate having first ends coupled to one of first bond pads on the first semiconductor device and the at least two connectors having second ends coupled to one of second bond pads on the second semiconductor device.
Semiconductor package having a solderable contact pad formed by a load terminal bond pad of a power semiconductor die
A semiconductor package includes: an insulating substrate having opposing first and second main sides; a power semiconductor die embedded in, and thinner than or a same thickness as, the substrate, and including a first load terminal bond pad at a first side which faces a same direction as the substrate first main side, a second load terminal bond pad at a second side which faces a same direction as the substrate second main side, and a control terminal bond pad; electrically conductive first vias extending through the substrate in a periphery region; a first metallization connecting the first load terminal bond pad to the first vias at the substrate first main side; solderable first contact pads at the substrate second main side and formed by the first vias; and a solderable second contact pad at the substrate second main side and formed by the second load terminal die bond pad.
CLIP STRUCTURE FOR SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
Provided is a clip structure for a semiconductor package comprising: a first bonding unit bonded to a terminal part of an upper surface or a lower surface of a semiconductor device by using a conductive adhesive interposed therebetween, a main connecting unit which is extended and bent from the first bonding unit, a second bonding unit having an upper surface higher than the upper surface of the first bonding unit, an elastic unit elastically connected between the main connecting unit and one end of the second bonding unit, and a supporting unit bent and extended from the other end of the second bonding unit toward the main connecting unit, wherein the supporting unit is formed to incline at an angle of 1° through 179° from an extended surface of the main connecting unit and has an elastic structure so that push-stress applying to the semiconductor device while molding may be dispersed.
Molded air-cavity package and device comprising the same
The present invention relates to a molded air-cavity package. In addition, the present invention is related to a device comprising the same. The present invention is particularly related to molded air-cavity packages for radio-frequency ‘RF’ applications including but not limited to RF power amplifiers. Instead of using hard-stop features that are arranged around the entire perimeter of the package in a continuous manner, the present invention proposes to use spaced apart pillars formed by first and second cover supporting elements. By using only a limited amount of pillars, e.g. three or four, the position of the cover relative to the body can be defined in a more predictable manner. This particularly holds if the pillars are arranged in the outer corners of the package.
Molded air-cavity package and device comprising the same
The present invention relates to a molded air-cavity package. In addition, the present invention is related to a device comprising the same. The present invention is particularly related to molded air-cavity packages for radio-frequency ‘RF’ applications including but not limited to RF power amplifiers. Instead of using hard-stop features that are arranged around the entire perimeter of the package in a continuous manner, the present invention proposes to use spaced apart pillars formed by first and second cover supporting elements. By using only a limited amount of pillars, e.g. three or four, the position of the cover relative to the body can be defined in a more predictable manner. This particularly holds if the pillars are arranged in the outer corners of the package.
Process for fabricating circuit components in matrix batches
A process for batch fabrication of circuit components is disclosed via simultaneously packaging multiple circuit component dice in a matrix. Each die has electrodes on its tops and bottom surfaces to be electrically connected to a corresponding electrical terminal of the circuit component it's packaged in. For each circuit component in the matrix, the process forms preparative electrical terminals on a copper substrate. Component dice are pick-and-placed onto the copper substrate with their bottom electrodes landing on corresponding preparative electrical terminal. Horizontal conductor plates are then placed horizontally on top of the circuit component dice, with bottom surface at one end of each plate landing on the dice's top electrode. An opening is formed at the opposite end and has vertical conductive surfaces. A vertical conductor block is placed into the opening and lands on the preparative electrical terminal, and the opening's vertical conductive surfaces facing the top end side surface of the vertical block. A thermal reflow then simultaneously melts pre-applied soldering material so that each circuit component die and its vertical conductor block are soldered to the copper substrate below and its horizontal conductor plate above.
Electronic device and method for manufacturing the same
An electronic device includes a support member and a mount member mounting on the support member. The support member and the mount member are sealed by a resin member. The support member includes a surface having a laser irradiation mark. The mount member includes a surface having a rough portion with an accumulation of material of the support member.
Method of manufacturing semiconductor devices and corresponding semiconductor device
Semiconductor dice are arranged on a substrate such as a leadframe. Each semiconductor die is provided with electrically-conductive protrusions (such as electroplated pillars or bumps) protruding from the semiconductor die opposite the substrate. Laser direct structuring material is molded onto the substrate to cover the semiconductor dice arranged thereon, with the molding operation leaving a distal end of the electrically-conductive protrusion to be optically detectable at the surface of the laser direct structuring material. Laser beam processing the laser direct structuring material is then performed with laser beam energy applied at positions of the surface of the laser direct structuring material which are located by using the electrically-conductive protrusions optically detectable at the surface of the laser direct structuring material as a spatial reference.
Method of manufacturing semiconductor devices and corresponding semiconductor device
Semiconductor dice are arranged on a substrate such as a leadframe. Each semiconductor die is provided with electrically-conductive protrusions (such as electroplated pillars or bumps) protruding from the semiconductor die opposite the substrate. Laser direct structuring material is molded onto the substrate to cover the semiconductor dice arranged thereon, with the molding operation leaving a distal end of the electrically-conductive protrusion to be optically detectable at the surface of the laser direct structuring material. Laser beam processing the laser direct structuring material is then performed with laser beam energy applied at positions of the surface of the laser direct structuring material which are located by using the electrically-conductive protrusions optically detectable at the surface of the laser direct structuring material as a spatial reference.
Chip assembly
A method of forming a chip assembly may include forming a plurality of cavities in a carrier; The method may further include arranging a die attach liquid in each of the cavities; arranging a plurality of chips on the die attach liquid, each chip comprising a rear side metallization and a rear side interconnect material disposed over the rear side metallization, wherein the rear side interconnect material faces the carrier; evaporating the die attach liquid; and after the evaporating the die attach liquid, fixing the plurality of chips to the carrier.