Various embodiments of a fault detector for a voltage converter are described. In one example embodiment, briefly. the fault detector is capable to detect one or more fault events during operation of a voltage converter. Likewise, the fault detector is capable to generate one or more fault signals with respect to the one or more to be detected fault events. The one or more fault signals, in the example embodiment, to signal a disconnect switch of the voltage converter to electrically disconnect or otherwise via a high impedance state to limit current flow through at least one switch of a set of switches of the voltage converter. In another example embodiment, the fault detector, responsive to the one or more fault signals, capable to generate a bus interrupt signal on a pin out, such as of an integrated circuit (IC) for use with the voltage converter, or capable to toggle a fault indicator pin out of the IC. Other additional embodiments are also described.

A semiconductor device includes a charge pump circuit suitable for generate an output voltage by pumping an input voltage according to first and second main clocks; a voltage detection circuit suitable for generating a comparison signal by comparing the output voltage with a reference voltage; and a driving control circuit suitable for generating the first and second main clocks according to first and second external clocks during an activation time period of the comparison signal while controlling a transition sequence such that the second main clock transitions after the first main clock transitions.

A voltage generation system might include a resistive voltage divider having a first resistance connected between its output and a first feedback node and a second resistance connected between the first feedback node and a first voltage node, a capacitive voltage divider having a first capacitance connected between its output and a second feedback node and a second capacitance connected between the second feedback node and the first voltage node, a comparator having an input connected to the second feedback node, and a voltage generation circuit configured to generate a voltage level at its output responsive to an output of the comparator and to a clock signal, wherein the first feedback node is selectively connected to the second feedback node and selectively connected to a second voltage node, wherein the first resistance is selectively connected to the first feedback node, and wherein the second resistance is selectively connected to the first voltage node.

A semiconductor device includes a charge pump circuit suitable for generate an output voltage by pumping an input voltage according to first and second main clocks; a voltage detection circuit suitable for generating a comparison signal by comparing the output voltage with a reference voltage; and a driving control circuit suitable for generating the first and second main clocks according to first and second external clocks during an activation time period of the comparison signal while controlling a transition sequence such that the second main clock transitions after the first main clock transitions.

Provided are embodiments for a circuit including a DC-DC converter for current controlled solenoid drive, the circuit includes a constant current source; a charge pump circuit comprising a plurality of stages. Each stage includes a capacitor configured to be charged to a predetermined voltage; a current source operable to charge the capacitor; a switch; and a controller that is configured to control switching of the switch for each of the plurality of stages based at least in part on an output current of the charge pump. Also, provided are embodiments of a method for operating a DC-DC converter for current controlled solenoid drive.

Various embodiments of a fault detector for a voltage converter are described. In one example embodiment, briefly, the fault detector is capable to detect one or more fault events during operation of a voltage converter. Likewise, the fault detector is capable to generate one or more fault signals with respect to the one or more to be detected fault events.

A multi-stage charge pump circuit including a first stage of the multi-stage charge pump having a first voltage output, a last stage of the multi-stage charge pump having a first voltage input, and an inter-stage limitation circuit configured to protect a voltage drop of the first voltage output of the first stage of the multi-stage charge pump when there is a voltage drop on the first voltage input of the last stage of the multi-stage charge pump.

A charge pump having an input section, and first and second output charge pump sections. The input section includes an input and output node and N input charge pump cells arranged between the input and output nodes. The first output charge pump section includes a first input and output node and M first charge pump cells arranged between the first input and output nodes. The second output charge pump section includes a second input and output node and K second charge pump cells arranged between the second input and output nodes (M, N, K: any integer1). The output node of the input charge pump section is coupled with the first input node of the first output charge pump section and with the second input node of the second output charge pump section. The charge pump is configured to provide a first output voltage on the first output node and a second output voltage on the second output node.

An apparatus for providing electric power to a load includes a power converter that accepts electric power in a first form and provides electric power in a second form. The power converter comprises a control system, a first stage, and a second stage in series. The first stage accepts electric power in the first form. The control system controls operation of the first and second stage. The first stage is either a switching network or a regulating network. The second stage is a regulating circuit when the first stage is a switching network, and a switching network otherwise.

Transient or fault conditions for a switched capacitor power converter are detected by measuring one or more of internal voltages and/or currents associated with switching elements (e.g., transistors) or phase nodes, or voltages or currents at terminals of the converter, and based on these measurements detect that a condition has occurred when the measurements deviate from a predetermined range. Upon detection of the condition fault control circuitry alters operation of the converter, for example, by using a high voltage switch to electrically disconnect at least some of the switching elements from one or more terminals of the converter, or by altering timing characteristics of the phase signals.