Disclosed herein are non-limiting examples of charge pumps that reduce the introduction of noise into a circuit in which they are implemented and/or lower the output impedance when providing certain voltages (e.g., negative voltage generators). The disclosed technologies utilize a plurality of smaller charge pumps (or charge pump units) working in parallel that operate on different clock phases rather than using a single charge pump with a relatively large flying capacitor or a plurality of charge pumps in series. This can, for example, reduce spurious signals or spurs that arise due at least in part to the characteristics of the clock signal. The disclosed technologies may be particularly advantageous for SOI-based components and circuits.

Various embodiments of energy storage elements for use in power converters are described. In one example embodiment, briefly, an integrated circuit (IC) for use with a power converter may comprise a first layer comprising a first set of devices disposed on a device face thereof; a second layer comprising a second set of devices disposed on a device face thereof; a first interconnect structure to be disposed between the first layer and an electrical interface, the first interconnect structure to electrically couple the first set of devices to one or more thru vias; and a second interconnect structure to be disposed between the first layer and the second layer, the second interconnect structure to electrically couple the second set of devices to the one or more thru vias. Likewise, in some instances, one or more thru vias may extend through at least one of the following: the first layer; the second layer; or any combination thereof.

During its first and second residence times, corresponding first and second currents flow between a charge pump and a circuit that connects to one of the charge pump's terminals. Based on a feedback measurement from the charge pump, a controller adjusts these first and second currents.

An apparatus for power conversion includes a transformation stage for transforming a first voltage into a second voltage. The transformation stage includes a switching network, a filter, and a controller. The filter is configured to connect the transformation stage to a regulator. The controller controls the switching network.

An object of the present technology is to stably operate a power supply circuit. A charge switch is connected to a first terminal of a capacitor and charges the capacitor with an input voltage on the basis of a control signal inputted to a control terminal. A discharge switch is complementary with the charge switch, is connected to the first terminal of the capacitor, and discharges on the basis of the control signal inputted to the control terminal the voltage charged to the capacitor, thereby generating an output voltage. A charge control signal converting section converts a charge control signal that controls the charge into a control signal referenced to the input voltage and inputs the resulting control signal to the control terminal of the charge switch. A discharge control signal converting section converts a discharge control signal that controls the discharge into a control signal referenced to the output voltage and inputs the resulting control signal to the control terminal of the discharge switch. A pulse voltage supplying section supplies a pulse voltage to a second terminal. A control signal generating section exclusively generates the charge control signal and the discharge control signal and supplies the charge control signal and the discharge control signal.

According to an aspect, a non-regulated power converter includes a plurality of switching tank converter (STC) modules configured to be connected in parallel and to a load. The plurality of STC modules includes a first STC module configured to generate a first output current and a second STC module configured to generate a second output current. The first STC module includes an output current (OC) measuring circuit configured to measure a value of the first output current, and a dead time (DT) adjustor configured to compare the value of the first output current with a value of a minimum output current provided by the plurality of STC modules. The DT adjustor is configured to adjust a dead time in response to the value of the first output current being greater than the value of the minimum output current.

Disclosed is an interleaved buck-boost converter. The interleaved buck-boost converter comprises a multi-level direct current (DC) to DC converter (MLDC converter), a flying capacitor monitor, and a voltage-level controller. The MLDC converter includes the IMPM and the IMPM includes the flying capacitor. The flying capacitor monitor is in signal communication with the flying capacitor and the voltage-level controller is in signal communication with the flying capacitor monitor. The flying capacitor monitor compares a flying capacitor voltage of the flying capacitor and switches a state of operation of the MLDC converter if the flying capacitor voltage is less than a first flying capacitor reference voltage.

In an embodiment a device includes a supply node configured to receive a supply voltage, an output node configured to provide an output voltage, a plurality of switching stages coupled to the supply node and to the output node, a sensing circuit coupled to the supply node and configured to provide at least one sensing signal based on the supply voltage and a driver circuit coupled to the sensing circuit and to the plurality of switching stages, wherein the driver circuit is configured to provide the drive signal based on at least one sensing signal exceeding or failing to exceed at least one reference voltage level and to selectively bypass a selected number of the plurality of switching stages based on the drive signal thereby varying an output voltage level at the output node.

Disclosed in the present invention are a charge pump circuit, a chip, and a communication terminal. The charge pump circuit comprises a phase clock generation module, an acceleration response control module, and a plurality of sub charge pump modules. By generating a plurality of clock signals with a fixed phase difference by means of the phase clock generation module, correspondingly controlling the plurality of sub charge pump modules to generate output voltages, and by means of the acceleration response control module, measuring the output voltage of each sub charge pump module, and separately outputting a logic signal to the phase clock generation module and each sub charge pump module, the frequency of the clock signals outputted by the phase clock generation module is changed, and the charge and discharge time of a capacitor in each sub charge pump module is reduced.

An apparatus for electric power conversion includes a converter having a regulating circuit and switching network. The regulating circuit has magnetic storage elements, and switches connected to the magnetic storage elements and controllable to switch between switching configurations. The regulating circuit maintains an average DC current through a magnetic storage element. The switching network includes charge storage elements connected to switches that are controllable to switch between plural switch configurations. In one configuration, the switches forms an arrangement of charge storage elements in which at least one charge storage element is charged using the magnetic storage element through the network input or output port. In another, the switches form an arrangement of charge storage elements in which an element discharges using the magnetic storage element through one of the input port and output port of the switching network.