An amplifier includes an input transistor, an input terminal, a first current source, a cascode transistor, and a second current source. The input transistor is coupled to the input terminal. The first current source is coupled to the input transistor and is configured to provide a bias current to the input transistor that is proportional to absolute temperature. The cascode transistor is coupled to the input transistor. The second current source is coupled to the cascode transistor and is configured to provide a bias current to the cascode transistor that is complementary to absolute temperature.

A differential amplifier circuit has a first current circuit comprising a first transistor and a second transistor, and to flow a current depending on a voltage of a first input signal, a second current circuit comprising a third transistor and a fourth transistor, and to flow a current depending on a voltage of a second input signal, a fifth transistor comprising a gate connected to a gate and the drain of the second transistor, and to flow a current that is M times greater than the current flowing between the drain and the source of the second transistor, and a sixth transistor comprising a gate connected to a gate and the drain of the fourth transistor and cascode-connected to the first transistor, and to flow a current that is N times greater than the current flowing between the drain and the source of the fourth transistor.

A servo-amplifier includes a first bipolar transistor, a second bipolar transistor, a cascode transistor, and a bias transistor. The second bipolar transistor includes an emitter terminal that is connected to an emitter terminal of the first bipolar transistor to form a differential amplifier. The cascode transistor includes a source terminal that is connected to a collector terminal of the first bipolar transistor. The bias transistor is coupled to the first bipolar transistor, the second bipolar transistor and the cascode transistor. The bias transistor is configured to generate a bias voltage to drive a gate terminal of the cascode transistor based on a voltage at a base terminal of the first bipolar transistor and a voltage at a base terminal of the second bipolar transistor. As a result, neither of the bipolar transistors enters a saturation region during transient or steady state operation.

A voltage-to-current converter that reduces third harmonic distortion. An amplifier includes an input stage. The input stage includes a first voltage-to-current conversion stage and a second voltage-to-current conversion stage. The first voltage-to-current conversion stage is configured to provide an input to output gain with compressive nonlinearity. The second voltage-to-current stage is cascaded with the first voltage-to-current conversion stage. An input of the second voltage-to-current stage is connected to an output of the first voltage-to-current conversion stage. The second voltage-to-current conversion stage is configured to provide an input to output gain with expansive nonlinearity.

A power amplifier circuit for broadband data communication over a path in a communication network can reduce or avoid gain compression, provide low distortion amplification performance, and can accommodate a wider input signal amplitude range. A dynamic variable bias current circuit can be coupled to a differential pair of transistors to provide a dynamic variable bias current thereto as a function of input signal amplitude. Bias current is increased when input signal amplitude exceeds a threshold voltage established by an offset or level-shifting circuit. The frequency response of the bias current circuit can track the full frequency content of the input signal, rather than its envelope. Gain degeneration can be modulated in concert with the bias current modulation to stabilize amplifier gain.

An operational amplifier includes an input stage configured to receive a first input voltage and a second input voltage and a slew boost circuit coupled to the input stage and configured to selectively increase current through the input stage. The operational amplifier also includes an output stage coupled to the input stage and configured to generate an output voltage, and a slew boost disable circuit configured to assert a control signal to the slew boost circuit to disable the slew boost circuit. The slew boost circuit is disabled when both: the first input voltage being more than a first threshold voltage different from the second input voltage and the output voltage failing to change by more than a second threshold rate.

An input stage of an operational amplifier receives first and second input voltages. An output slew detection circuit decreases a first current responsive to slewing of an output of the operational amplifier and increases the first current responsive to no slewing. A slew boost and differential input voltage detection generates a second current at a first level when the first and second input voltages are approximately equal and to generate the second current at a second level, smaller than the first level, responsive to the first and second input voltages not being approximately equal. A voltage on a capacitor increases responsive to the first current from the output slew detection circuit increasing and responsive to the second current being at the second level. A current mirror is activated responsive to the voltage on the capacitor exceeding a second threshold. The current mirror decreases a third current of the input stage.

An operational amplifier includes an input stage configured to receive a first input voltage and a second input voltage and a slew boost circuit coupled to the input stage and configured to selectively increase current through the input stage. The operational amplifier also includes an output stage coupled to the input stage and configured to generate an output voltage, and a slew boost disable circuit configured to assert a control signal to the slew boost circuit to disable the slew boost circuit. The slew boost circuit is disabled when both: the first input voltage being more than a first threshold voltage different from the second input voltage and the output voltage failing to change by more than a second threshold rate.

An input stage of an operational amplifier receives first and second input voltages. An output slew detection circuit decreases a first current responsive to slewing of an output of the operational amplifier and increases the first current responsive to no slewing. A slew boost and differential input voltage detection generates a second current at a first level when the first and second input voltages are approximately equal and to generate the second current at a second level, smaller than the first level, responsive to the first and second input voltages not being approximately equal. A voltage on a capacitor increases responsive to the first current from the output slew detection circuit increasing and responsive to the second current being at the second level. A current mirror is activated responsive to the voltage on the capacitor exceeding a second threshold. The current mirror decreases a third current of the input stage.

An amplifier that amplifies a differential signal includes first and second input terminals for receiving two input signals; first and second diodes each including an anode and a cathode, the anodes being electrically connected to the first and second input terminals; first and second bias current sources being respectively electrically connected to the cathodes of the first and second diodes; an operational amplifier connected to the cathode of the first diode and the cathode of the second diode and configured to amplify a differential signal between signals generated at the cathodes of the first and second diodes; a capacitive element being electrically connected between an input and an output of the operational amplifier; and a differential amplifier provided between the operational amplifier and the first and second input terminals and configured to amplify the two input signals. The first and second bias current sources include a current mirror circuit.