Many embodiments of the invention include stacked power amplifier configurations that include control circuitry for sensing the operational characteristics of the power amplifiers and adjusting the current drawn by one or more of the power amplifiers to prevent any of the power amplifiers from experiencing over voltage stresses and/or to increase the operational efficiency of the power amplifiers.

The invention provides a Low-voltage Differential Signaling (LVDS) receiver circuit that comprises a folded-cascode operational transconductance amplifier (OTA) that includes a pair of input branches and a pair of output branches. The pair of input branches of the folded-cascode OTA includes a p-channel metal-oxide semiconductor (PMOS) input transistor pair connected to a first supply voltage domain. The pair of output branches includes an output circuit connected to a second supply voltage domain. The LVDS receiver circuit further includes a common-mode feedback circuit connected to the pair of output branches of the folded-cascode OTA that controls the second supply voltage domain. The LVDS receiver circuit further includes a regenerative buffer circuit connected to the pair of output branches of the folded-cascode OTA and an output generated from the pair of output branches of the folded-cascode OTA directly operates the regenerative buffer circuit to produce a distortion-free output signal.

Systems and methods are provided for improved noise performance of audio amplifiers. In one example, a system includes a multistage amplifier comprising at least a first stage amplifier and a second stage amplifier. The system further includes a plurality of switches disposed within the multistage amplifier to configure the multistage amplifier. The system further includes a control signal configured to control the multistage amplifier to a normal amplification mode or a mute state, wherein the multistage amplifier is adapted to amplify an input signal in the normal amplification mode, the multistage amplifier is adapted to output a zero signal in the mute state, and internal amplification stages of the multistage amplifier are disabled in the mute state, and output stages of each of the at least first stage amplifier and the second stage amplifier are electrically shorted and/or shorted to a fixed bias voltage in the mute state.

A receiver front-end circuit and an operating method thereof are disclosed. The receiver front-end circuit includes a common-mode suppression circuit and a rear-stage circuit. The common-mode suppression circuit is used to receive an external input common-mode voltage signal and perform common-mode noise suppression processing on the external input common-mode voltage signal, and then output an internal input common-mode voltage signal. The rear-stage circuit is coupled to the common-mode suppression circuit and used to receive the internal input common-mode voltage signal. The dynamic swing of the internal input common-mode voltage signal is smaller than the dynamic swing of the external input common-mode voltage signal.

Various embodiments of the present technology comprise a method and apparatus for an operational amplifier with a variable gain-bandwidth product. According to various embodiments, an amplifier circuit comprising the operational amplifier operates in multiple stages and provides a low gain-bandwidth and a high gain-bandwidth.

A reference voltage generating circuit includes a bandgap reference (BGR) circuit configured to output an active reference voltage at a first node according to a sample signal; a first charging circuit configured to charge a first capacitor using the active reference voltage according to the sample signal; a second charging circuit configured to charge a second capacitor using the active reference voltage according to the sample signal; and a comparing circuit configured to compare a voltage difference between a charge voltage of the first capacitor and a charge voltage of the second capacitor with a threshold value, wherein the sample signal is a pulse signal generated using an output of the comparing circuit and the charge voltage of the first capacitor is provided as a low power reference voltage in a low power operation mode.

The disclosed embodiments relate to the design of a system that implements an up-conversion mixer. This system includes a regulator-based linearized transconductance (g.sub.m) stage, which converts a differential intermediate frequency (IF) voltage signal into a corresponding pair of IF currents. It also includes a pair of current mirrors, which duplicates the pair of IF currents into sources of a set of switching transistors. The set of switching transistors uses a differential local oscillator (LO) signal to gate the duplicated pair of IF currents to produce a differential radio frequency (RF) output signal. Finally, a combination of capacitors and/or inductors is coupled to common source nodes of the set of switching transistors to suppress higher order harmonics in an associated common source node voltage signal.

A low power consumption integrating circuit based on adaptive current regulation, including an amplifier A2, a capacitor Ci, a bias current regulating circuit, where a negative power source terminal of the amplifier A2 is connected to an output terminal of the amplifier A2 through the capacitor Ci, an output of the bias current regulating circuit is connected to an input terminal of the amplifier A2; and the bias current regulating circuit adjusts a bias current according to different light intensity. According to the present invention, the bias current regulating circuit dynamically adjusts, according to light intensity, a bias current input to the amplifier A2, so as to significantly reduce the overall power consumption of the circuit while ensuring a rapid response capability of an optical frequency sensor.

An electronic circuit including: a differential multiplier circuit with a first differential input and a second differential input and a differential output; and a phase locked loop (PLL) circuit including: (1) a balanced differential mixer circuit with a first differential input electrically connected to the differential output of the differential multiplier circuit, a second differential input, and an output; (2) a loop filter having an output and an input electrically connected to the output of the balanced differential mixer circuit; and (3) a voltage controlled oscillator (VCO) circuit having an input electrically connected to the output of the loop filter and with an output electrically feeding back to the second differential input of the balanced differential mixer circuit.

Various embodiments of the present technology may provide methods and apparatus for an amplifier integrated circuit. The amplifier integrated circuit may provide a low gain bandwidth product to amplify at a higher speed and a high gain bandwidth product to amplify at a lower speed. The amplifier integrated circuit may achieve the low and high gain bandwidth product by generating a first current and a second current through a plurality of sets of series-connected transistors and operating a plurality of switches.