The present invention includes a current integrator for an organic light-emitting diode (OLED) panel. The current integrator includes an operational amplifier, which includes an output stage. The output stage, coupled to an output terminal of the current integrator, includes a first output transistor, a second output transistor, a first stack transistor and a second stack transistor. The first stack transistor is coupled between the first output transistor and the output terminal. The second stack transistor is coupled between the second output transistor and the output terminal.

A buffer circuit is provided. The buffer circuit includes a Current Differencing Transconductance Amplifier (CDTA) comprising a first input node and a second input node each configured to receive a respective one of a first signal and a second signal. The buffer circuit further includes a first source follower circuit coupled to a first output node of the CDTA and configured to generate a first buffer output signal based on a first output signal of the CDTA. Additionally, the buffer circuit includes a second source follower circuit coupled to a second output node of the CDTA and configured to generate a second buffer output signal based on a second output signal of the CDTA. The buffer circuit further includes a first feedback path comprising at least one of a first resistive element and a first capacitive element. The first feedback path couples an output node of the first source follower circuit to the first input node of the CDTA. In addition, the buffer circuit includes a second feedback path comprising at least one of a second resistive element and a second capacitive element. The second feedback path couples an output node of the second source follower circuit to the second input node of the CDTA.

This disclosure relates to an output buffer including an input stage configured to monitor a difference between an input voltage and an output voltage, a current summing stage configured to generate amplified currents and control voltages according to the difference between the input voltage and the output voltage monitored by the input stage, an output stage configured to perform a pull-up operation or a pull-down operation according to the control voltages output from the current summing stage to generate the output voltage at an output terminal, and a slew boost circuit configured to perform a slew boost operation of adjusting some currents among currents provided from the current summing stage to the input stage according to the difference between the input voltage and the output voltage by monitoring the difference between the input voltage and the output voltage and selectively perform the slew boost operation by monitoring the control voltages.

An input stage for an LVDS receiver circuit is provided, which includes at least one supply voltage connection as well as a first and a second stage input to be acted upon by a differential input signal pair. The input stage further includes a first and a second differential stage, the stage inputs being directly connected to one input each of the first differential stage and indirectly, via one level-shifting circuit each, to one input each of the second differential stage. According to the present invention, the first and the second differential stage are connected to the supply voltage connection via one transistor each of a third differential stage, the control input of one of these transistors being connected to a measuring path connecting the stage inputs to one another, with the control input of the other transistor being connected to an apparatus/device (arrangement) for providing a reference voltage.

An operational amplifier comprises a front stage and an output stage. The front stage comprises a first input transistor, a second input transistor, a first node, a second node, and a first current mirror. A first voltage based on a first current through the first input transistor is generated on the first node. A second voltage based on a second current through the second input transistor is generated on the second node. The output stage is configured to output an output voltage based on at least one of the first voltage and the second voltage. The first current mirror comprises a first transistor having a drain connected to the first node, a second transistor having a drain connected to the second node, and a first offset canceling capacitor connected between gates of the first transistor and the second transistor.

A neural recording probe and interface, along with a method of assembly, with the neural recording probe being minimally invasive and having high-density, multi-channel microelectrodes. In one example, the neural probe includes a plurality of bumps projecting from a bottom surface of a terminal body. Each bump is electrically connected to a corresponding one of a plurality of electrodes. The plurality of bumps is bonded to a respective one of a plurality of area pads of the integrated circuit with an anisotropic conductive film such that each of the plurality of electrodes of the neural probe is electrically connected to a respective one of the active circuits of the integrated circuit.

An operational amplifier includes a single-stage amplifier and a current controller. The single-stage amplifier receives an input signal, and amplifies the input signal to generate an output signal, wherein the single-stage amplifier includes a voltage controlled current source circuit that operates in response to a bias voltage input. The current controller receives the input signal, and generates the bias voltage input according to the input signal.

The amplifier includes an input circuit configured to convert an input signal into a current; an output circuit comprising at least one switching element for reducing a voltage change of an output end of the input circuit and configured to provide an output signal; and a biasing circuit connected to the at least one switching element to form a feedback loop for reducing the voltage change of the output end of the input circuit.

Aspects of the description provide for a circuit. In some examples, the circuit includes a input pair of transistors, a bias transistor having a bias transistor gate, a bias transistor drain, and a bias transistor source, the bias transistor drain coupled to the input pair of transistors and the bias transistor source coupled to ground, and a resistor coupled between the bias transistor gate and the input pair of transistors.

An apparatus to prevent supply-to-ground current in a comparator is disclosed. The apparatus includes circuitry to determine if first and second output nodes of the comparator have respectively reached first and second logic levels, and circuitry responsive to a determination that the voltage at the first and second output nodes of the comparator has reached the first and second logic levels, to generate a signal. In addition, the apparatus includes circuitry to supply the signal to a transistor, the signal to turn off the transistor and prevent the flow of supply-to-ground current through the comparator.