Patent classifications
H03F3/45215
Driving apparatus for a light emitting device and method for the same
A driving apparatus configured to drive a light emitting device includes a driving current source module operable to supply current to the light emitting device via a node during operation. A protection module coupled to the node and the driving current source module selectively injects current to the node during operation. The driving current source module is controlled based on a detection result of a voltage on the node.
HYBRID LOW POWER RAIL TO RAIL AMPLIFIER WITH LEAKAGE CONTROL
An amplifier includes first and second input transistors, a first current mirror, a second current mirror, and a third current mirror. An input terminal of the first current mirror is coupled to a drain of the first input transistor, an input terminal of the second current mirror is coupled to a drain of the second input transistor, and an input terminal of the third current mirror is coupled to an output terminal of the first current mirror. An output terminal of the first current mirror and an output terminal of the third current mirror are coupled to an output of the amplifier. The amplifier also includes third and fourth input transistors, wherein a drain of the third input transistor is coupled to the input terminal of the third current mirror, and a drain of the fourth input transistor is coupled to the output of the amplifier.
APPARATUS AND METHOD FOR REDUCING AMPLIFIER FEEDBACK CAPACITOR WITH BYPASS AMPLIFICATION STAGE
A touchscreen controller includes a set of transmitters for generating transmit signals applied to electrically-conductive transmit lines of a touchscreen panel, and a set of receivers configured to receive the signals via electrically-conductive receive lines that are capacitively coupled to the transmit lines. Each receiver includes an integrator to integrate the received current signal to generate an output voltage used for determining a location, if any, of a finger or object touching the panel. The integrator includes input and output amplification stages, and a feedback capacitor coupled between an input and output of the cascaded amplification stages. The capacitance of the feedback capacitor is configured so that the integrator achieves a desired rejection of a received jammer current signal. To reduce the size of the feedback capacitor, a bypass amplification stage is provided to steer away some of the input jammer current from the input of the integrator.
Biphase mark coding transceiver
A Biphase Mark Coding (BMC) transceiver is provided. In the BMC transceiver, an operational amplifier operating in a time division multiplexing manner is used. The operational amplifier is configured as a unity gain buffer, and it is determined whether the BMC transceiver operates as a transmitter or a receiver by selecting different input switches and output switches. In a transmitting mode, a bias current of an input differential pair transistor of the operational amplifier is changed, to change a slew rate, so as to obtain an output waveform with adjustable rising/falling edges of the transmitter.
PREDICTIVE DIGITAL AUTORANGING ANALOG-TO-DIGITAL CONVERTER
An apparatus may include a delta sigma modulator. A first portion of the delta sigma modulator may form a digital predictor while a second portion of the delta sigma modulator may form an analog approximator. An output of the analog approximator may be coupled with a quantizer. The digital predictor, the analog approximator, and the quantizer may form a digitizing loop configured to convert an analog input into a digital output. The digital predictor may be configured to generate, based on a polarity of one or more digital outputs from the quantizer, a digital prediction of an expected amplitude of the analog input. The quantizer may be configured to respond to the digital prediction by adjusting a dynamic range of the digitizing loop including by changing a quantization step size used by the quantizer to quantize the analog input. Related methods are also provided.
AMPLIFIER WITH CONSTANT VOLTAGE GAIN
An amplifier includes an input stage. The input stage includes a differential pair and a load circuit. The differential pair includes a first transistor and a second transistor. The first transistor and the second transistor are configured to amplify a received differential signal. The load circuit connects the differential pair to a reference voltage. The load circuit is configured to vary in resistance in inverse proportion to the transconductance of the first transistor and the second transistor.
AMPLIFIER WITH CONSTANT VOLTAGE GAIN
An amplifier includes an input stage. The input stage includes a differential pair and a load circuit. The differential pair includes a first transistor and a second transistor. The first transistor and the second transistor are configured to amplify a received differential signal. The load circuit connects the differential pair to a reference voltage. The load circuit is configured to vary in resistance in inverse proportion to the transconductance of the first transistor and the second transistor.
CLASS-D AMPLIFIER WITH MULTIPLE INDEPENDENT OUTPUT STAGES
A Class-D amplifier having a low power dissipation mode includes first and second independent output stages that receive respective first and second level power supply voltages for driving a load coupled to the amplifier output during respective first and second operating modes. Bypass switches are controllable to disconnect the second output stage from the output during the first operating mode and to connect the second output stage to the output during the second operating mode. The operating modes are selected based on the amplifier output power level. First and second independent pre-driver stages receive the respective first and second level power supply voltages for driving the respective first and second independent output stages. During the second operating mode the first pre-driver stage is placed into a low power dissipation state and during the first operating mode the second pre-driver stage is placed into a low power dissipation state.
LOW POWER DISSIPATION HIGH PERFORMANCE CLASS-D AMPLIFIER
In a Class-D amplifier, first/second ratios and first/second RC time constants are sequentially matched by trimming. An integrator is coupled to differential first/second paths. The first/second ratios are of a feedback resistor to an input resistor in the first/second paths. R's of the first/second RC time constants are the resistors of the first/second matched ratios. C's of the first/second RC time constants are integrating capacitors in the first/second path. For each of multiple power rails, a ramp amplitude is determined based on a sensed voltage. Concurrently, the driver stage is switched from first to second power rails and quantizer switched from first to second ramp amplitudes to achieve constant combined quantizer/driver stage gain. Based on a sensed load current, an IR drop is determined for a respective output impedance of the driver stage and added to a loop filter output to compensate for the respective output impedance.
DRIVING APPARATUS FOR A LIGHT EMITTING DEVICE AND METHOD FOR THE SAME
A driving apparatus configured to drive a light emitting device includes a driving current source module operable to supply current to the light emitting device via a node during operation. A protection module coupled to the node and the driving current source module selectively injects current to the node during operation. The driving current source module is controlled based on a detection result of a voltage on the node.