The transmission delay time of a receiver for receiving a differential signal is reduced. A first amplifier circuit is provided in an input stage of the receiver, and a second amplifier circuit is provided in an output stage of the receiver. The first amplifier circuit is a differential input, differential output amplifier circuit. The second amplifier circuit is a differential input, single-ended output amplifier circuit. A first power supply voltage and a second power supply voltage are input as a high-level power supply voltage and a low-level power supply voltage to the first amplifier circuit and the second amplifier circuit, respectively. The withstand voltage of transistors of a differential pair of the first amplifier circuit is higher than the withstand voltage of another transistor included in the first amplifier circuit and a transistor included in the second amplifier circuit.

In a general aspect, a current sense amplifier circuit (CSA) can include a null amplifier path and a main amplifier path that are both configured to receive a differential input voltage. The null amplifier path can output a first differential output voltage based on the differential input voltage. The main amplifier path can also be configured to receive the first differential output voltage and output a second differential output voltage based on the differential input voltage and the first differential output voltage. The null and main amplifier paths can each include a differential amplifier having first and second input stages that are each configured to receive the differential input voltage. The first input stage and the second input stage of the main amplifier path can and be powered by a respective (first and second) floating voltage supply rails that are referenced to a floating ground rail.

A differential amplifier which does not have an effect of noise resistance deterioration, waveform distortion, and a lower bandwidth while having a wide input range is realized. The differential amplifier does not cause deterioration in a signal quality due to an increase in an input load, and it is not necessary to additionally provide a configuration for generating a reference voltage. The differential amplifier includes a differential amplification circuit and an output circuit for amplifying and outputting a differential output from the differential amplification circuit. The differential amplification circuit includes a first conductive type first differential pair which supplies output currents according to a positive phase input signal and a reverse phase input signal to the output circuit, a second conductive type second differential pair which supplies output currents according to a positive phase input signal and a reverse phase input signal to the output circuit, a detector which detects an operation state of a differential pair, and an alternative current supplying circuit which supplies an alternative current for the output current of the differential pair which has been turned off to the output circuit.

Provided is an output amplifier including a differential unit which sends a current corresponding to a voltage difference between a gradation voltage and an amplified gradation voltage to a first current line; a current mirror unit which sends an amount of current corresponding to the current flowing through the first current line, to a second current line; and an output unit including a first and a second drive line, an output line through which the amplified gradation voltage is output, a first output transistor which sends a current based on a voltage of the first drive line, and a second output transistor which sends a current based on a voltage of the second drive line. The output unit includes a voltage regulation circuit which controls the voltage of the first drive line being higher than the voltage of the second drive line.

An amplifier circuit including a first folded double cascode stage configured to receive a differential input signal at a first pair of input transistors and generate a first drive signal, a second folded double cascode stage configured to receive the differential input signal at a second pair of input transistors and generate a second drive signal, and an output stage. The output stage includes a PMOS common-source output transistor configured to receive the first drive signal at its gate, and an NMOS common-source output transistor configured to receive the first drive signal at its gate, the PMOS common-source output transistor and NMOS common-source output transistor being jointly configured to generate an output signal based on the first drive signal and the second drive signal.

The overdrive amplifier may include: a differential input circuit arranged by connecting, in a folded-cascode style, input transistors supplied with an input signal at gates, and feedback input transistors accepting the feedback of an output signal at respective gates; a current mirror load having mirror input current paths connected to current paths of the feedback input transistors, and mirror output current paths connected to current paths of the input transistors; an output circuit accepting the input of output control signals from the mirror output current paths of the current mirror load; and an overdrive circuit which causes bias currents of directions which boost an output of the output circuit, depending on the output control signals, to pass through the current mirror load based on the output control signals in an overdrive period.

An operational amplifier circuit is provided. The operational amplifier circuit includes a differential input stage circuit and a loading stage circuit. The differential input stage circuit includes an input circuit, a voltage maintaining circuit, and a current source. The input circuit includes a first input transistor and a second input transistor, for receiving a first and a second input signals, respectively. The voltage maintaining circuit includes a first branch circuit and a second branch circuit. The first branch circuit is coupled to the first input transistor for receiving the first input signal, and the second branch circuit is coupled to the second input transistor for receiving the second input signal. The current source is coupled to the first input transistor and the second input transistor. The loading stage circuit is coupled to the voltage maintaining circuit.

The present invention provides a class AB amplifier, wherein the class AB amplifier includes a cascode stage with a filter and an output stage. The cascode stage with the filter is arranged for receiving an input signal to generate a first driving signal and a second driving signal, wherein the filter filters the input signal to generate an filtered input signal, and at least one of the first driving signal and the second driving signal is generated according to the filtered input signal. The output stage is coupled to the cascode stage, and is arranged for generating an output signal according to the first driving signal and the second driving signal.

According to an embodiment, an active inductor has a first conductivity type MOS transistor with a source that is connected to an electrical power source supply line and a drain that is connected to an output terminal. It has a capacitance between a gate of the first conductivity type MOS transistor and the electrical power source supply line. It has a diode element that is connected between a drain and a gate of the first conductivity type transistor. It has an electric current source that supplies a bias electric current in a forward direction to the diode element.

A source driver includes a buffer device including a plurality of buffers corresponding to a plurality of data lines, each of the plurality of buffers respectively including an amplifier configured to amplify an input signal and an output driver configured to output a driving signal to a corresponding data line among the plurality of data lines; and a switch device including a charge sharing switch configured to electrically connect the plurality of data lines to one another during a charge sharing operation, each of the amplifiers including a first current mirror having a reference current path including a first node and an output current path including a second node, and the first node of the reference current path and the second node of the output current path are electrically connected to each other during the charge sharing operation.