The present invention provides a differential signal offset adjustment circuit, wherein first and second transistors are respectively coupled between a power supply line and a first current source, and between the power supply line and a second current source. First and second resistors are respectively coupled between the first transistor and a first variable current source, and between the second transistor and a second variable current source. Third and fourth transistors are respectively coupled between a third resistor and a third current source, and between a fourth resistor and a fourth current source, and have input terminals respectively coupled to the first and second resistors. Fifth and sixth transistors are respectively coupled between the power supply line and a fifth current source, and between the power supply line and a sixth current source, and have input terminals respectively coupled to the third and fourth transistors. A fifth resistor is coupled between the third and fourth current sources.

A DC offset cancellation circuit and a DC offset cancellation method are disclosed. The DC offset cancellation circuit comprises a high-speed amplifier, a voltage comparator, a microprocessor, and a digital-to-analog converter. The high-speed amplifier comprises an input stage with a DC offset cancellation function, an amplification stage, and an output buffer stage. The voltage comparator is connected to the output buffer stage. The microprocessor is connected to the voltage comparator. The digital-to-analog converter is connected to the microprocessor. The digital-to-analog converter is connected to the input stage.

Within a modulator driver, different blocks are employed, e.g. a buffer, one or more variable gain amplifiers (VGA), and a final driver stage. Each of these blocks has an optimum bias point for best performance; however, interconnecting the blocks requires sharing the DC bias points in their interface, which does not necessarily match the optimum performance bias point of each block.. Accordingly, a first offset feedback loop extending from reference points after a selected one of the blocks to an input of one of the blocks. The first offset feedback loop includes current sources capable of delivering a variable current to the input of the selected block in order to compensate any offset in an amplified differential input electrical signal measured at the reference points. A first bias feedback loop is also provided, including a current sinker for subtracting excess current introduced in the first offset compensation feedback loop.

A chopper stabilized amplifier includes a first transconductance amplifier, first chopping circuitry coupled to an input of the first transconductance amplifier for chopping an input signal and applying the chopped input signal to the input of the first transconductance amplifier, and second chopping circuitry coupled to an output of the first transconductance amplifier for chopping an output signal produced by the first transconductance amplifier. A ping-pong notch filter is connected to an output of the second chopping circuitry and performs an integrate and transfer function on a chopped output signal produced by the second chopping circuitry to filter ripple voltages. The ping-pong notch filter includes parallel connected first and second notch filters, each of which has an input coupled to the output of the second chopping circuitry.

A signal processing circuit amplifies a signal of a magnetic sensor that changes according to the magnitude of a magnetic force. The signal of the magnetic sensor is a pair of signals inverted from each other with respect to a reference voltage. The signal processing circuit includes: a high-pass filter that performs a high-pass filtering process on the complementary signals from the magnetic sensor; a differential amplifier that receives the complementary signals having been subjected to the high-pass filtering process by the high-pass filter as a differential input signal and amplifies the differential input signal at a predetermined amplification factor based on the reference voltage; and a comparator that outputs a binary signal indicating a comparison result between an output signal of the differential amplifier and the reference voltage.

In accordance with embodiments of the present disclosure, a method for power supply rejection for an amplifier may include generating a correction signal by multiplying a quantity indicative of a power supply voltage of the amplifier by a transfer function defining a response from the power supply voltage of the amplifier to an output signal of the amplifier and subtracting the correction signal from a signal within a signal path of a circuit comprising the amplifier.

The present invention provides a differential to single-ended converter including a first input node, a second input node, an operational amplifier and a feedback circuit. The operational amplifier has a first terminal and a second terminal, wherein the first terminal of the operational amplifier receives a first signal from the first input terminal, and the second terminal of the operational amplifier receives a second signal from the second input terminal. The feedback circuit is configured to receive an output signal of the operational amplifier and generate a first feedback signal to the first terminal of the operational amplifier to reduce a swing of the first signal, and generate a second feedback signal to the second terminal of the operational amplifier to balance noises induced by the feedback circuit and inputted to the first terminal and the second terminal.

In optical receivers, cancelling the DC component of the incoming current is a key to increasing the receiver's effectiveness, and therefore increase the channel capacity. Ideally, the receiver includes a DC cancellation circuit for removing the DC component; however, in differential receivers an offset may be created between the output voltage components caused by the various amplifiers. Accordingly, an offset cancellation circuit is required to determine the offset and to modify the DC cancellation circuit accordingly.

An offset cancellation circuit and method are provided where successive stages of cascaded amplifiers are operated in a saturated state. Biasing is provided, by a feedback amplifier, connected in a feedback loop for each cascaded amplifier, so as to be responsive, in a non-saturated state, to the input of an associated amplifier stage operating in the saturated state.

In optical receivers, cancelling the DC component of the incoming current is a key to increasing the receiver's effectiveness, and therefore increase the channel capacity. Ideally, the receiver includes a DC cancellation circuit for removing the DC component; however, in differential receivers an offset may be created between the output voltage components caused by the various amplifiers. Accordingly, an offset cancellation circuit is required to determine the offset and to modify the DC cancellation circuit accordingly.