H03H17/0657

Transport vehicle for suppressing vibration of goods, and goods transport system including same vehicle and for use in manufacturing plant
12020966 · 2024-06-25 · ·

Proposed is a transport vehicle including a traveling unit being moved along a first direction, a slide unit being driven for sliding in a second direction vertical to the first direction, a hand unit ascending and descending by a hoist combined with the slide unit and gripping the goods, and a control unit controlling driving of the traveling unit for traveling or driving of the slide unit for sliding, wherein the control unit applies a filter signal to an initial slide control signal for driving for sliding and controls driving of the hand unit for sliding through a drive control signal for sliding to which the filter signal is applied, and the filter signal includes a plurality of impulse signals and an interval between the impulse signals is determined as a value corresponding to a length of the hoist in linear interpolation on pre-stored period values on a per-hoist-length basis.

GLITCH IMMUNE CASCADED INTEGRATOR COMB ARCHITECTURE FOR HIGHER ORDER SIGNAL INTERPOLATION

A digital filtering method includes receiving a digital signal, and passing the digital signal through a Pth order comb cascade. The method includes beginning pre-computing of intermediate integrator states of a Pth order integrator cascade as a function of the digital signal, prior to receiving output from a last comb of the Pth order comb cascade. The outputs from each comb of the Pth order comb cascade are then applied to the pre-computed intermediate integrator states to thereby produce a filtered version of the digital signal. The Pth order comb cascade may operate at a sampling frequency, and the pre-computing of the intermediate integrator states is performed at the sampling frequency, while the application of the outputs from each comb of the Pth order comb cascade to the pre-computed intermediate integrator states is performed at a multiple of the sampling frequency.

Digital Phase Locked Loop Clock Synthesizer with Image Cancellation
20190123723 · 2019-04-25 · ·

A frequency synthesizer includes a hardware digital controlled oscillator (HDCO) running at a first clock rate f.sub.S for generating an output clock signal in response to a control input, and a digital phase locked loop (DPLL) responsive to a reference input sampled at a second clock rate f.sub.samp, the first clock rate f.sub.S being N times greater than the second clock rate f.sub.samp, The DPLL includes a loop filter and a software digital controlled oscillator (SDCO). A first, first order linear interpolation anti-imaging filter running at a clock rate higher than said second clock rate f.sub.samp is coupled to an output of the loop filter for providing the control input to the HDCO. A second, first order linear interpolation anti-imaging filter running at said second clock rate coupled to the output of said loop filter to provide an input to said SDCO.

Interpolation filter system implemented by digital circuit
12046251 · 2024-07-23 · ·

An interpolation filtering system implemented by a digital circuit is provided, it includes an interpolation filtering operation controller, a cascaded drive module, an intermediate result cache Random Access Memory (RAM), and a filter coefficient storage Read Only Memory (ROM). The intermediate result cache RAM is configured to store externally input data of the interpolation filtering system and intermediate results output by the filter operation modules. The filter coefficient storage ROM is configured to store filter coefficients required for calculation by the filter operation modules. The interpolation filtering operation controller is configured to control, under the drive of counting beats output by the cascaded drive module, the master state machine to select data of the intermediate result cache TAM or externally directly input data to be sent to the cascaded filter operation modules for accumulation operation, and to select the filter coefficients of the filter coefficient storage ROM for multiplication operation.

RECEIVING DEVICE
20190020508 · 2019-01-17 · ·

A receiving device includes: a resampler to convert a sampling rate of a reception signal, and output a first signal that is a signal having been subjected to sampling rate conversion; an equalizer to perform an adaptive equalization process using the first signal as an input, and output a second signal that is a signal having been subjected to the adaptive equalization process and having a sampling rate that is an integer fraction of an input signal; a correlation calculator to calculate a correlation function between the first signal and the second signal; and a rate controller to control a rate conversion ratio for sampling rate conversion in the resampler on a basis of the correlation function.

Transformation Based Filter for Interpolation or Decimation

A digital filter for interpolation or decimation and a device incorporating the digital filter is disclosed. The digital filter includes a filter block, a first transformation circuit coupled to the filter block and an input stream coupled to provide input values to a component selected from the filter block and the first transformation circuit. The filter block includes a pair of sub-filters having respective transformed coefficients, the respective transformed coefficients of a first sub-filter of the pair of sub-filters being symmetric and the respective transformed coefficients of a second sub-filter of the pair of sub-filters being anti-symmetric. The first transformation circuit is coupled to perform a first transformation; the filter block and the first transformation circuit together provide suppression of undesired spectral images in final outputs of the digital filter.

Transformation based filter for interpolation or decimation

A digital filter for interpolation or decimation and a device incorporating the digital filter is disclosed. The digital filter includes a filter block, a first transformation circuit coupled to the filter block and an input stream coupled to provide input values to a component selected from the filter block and the first transformation circuit. The filter block includes a pair of sub-filters having respective transformed coefficients, the respective transformed coefficients of a first sub-filter of the pair of sub-filters being symmetric and the respective transformed coefficients of a second sub-filter of the pair of sub-filters being anti-symmetric. The first transformation circuit is coupled to perform a first transformation; the filter block and the first transformation circuit together provide suppression of undesired spectral images in final outputs of the digital filter.

Integrated circuit device with reconfigurable digital filter circuits

An integrated circuit device can include at least one input; at least one output configured to provide a multi-bit output value; at least one input; at least one output configured to provide a multi-bit output value; a plurality of configurable digital filter circuits; and switch circuits coupled to the at least one input and to the at least one output, the switch circuits configurable to connect same digital filter circuits as a single processing path or separate processing paths.

TRANSFORMATION BASED FILTER FOR INTERPOLATION OR DECIMATION

A digital filter for interpolation or decimation and a device incorporating the digital filter is disclosed. The digital filter includes a filter block, a first transformation circuit coupled to the filter block and an input stream coupled to provide input values to a component selected from the filter block and the first transformation circuit. The filter block includes a pair of sub-filters having respective transformed coefficients, the respective transformed coefficients of a first sub-filter of the pair of sub-filters being symmetric and the respective transformed coefficients of a second sub-filter of the pair of sub-filters being anti-symmetric. The first transformation circuit is coupled to perform a first transformation; the filter block and the first transformation circuit together provide suppression of undesired spectral images in final outputs of the digital filter.

Audio filtering with virtual sample rate increases
09949029 · 2018-04-17 ·

The present invention relates broadly to a method of digitally filtering an audio signal by applying a composite audio filter. The composite audio filter may be obtained by applying one audio filter to another audio filter each having the same predetermined sample rate including neighboring sample points. The other audio filter may also include one or more intervening sample points between adjacent of its neighboring sample points. The one audio filter may be applied to the other audio filter at an adjusted sampling rate relative to the other audio filter. The adjusted sampling rate may be inversely proportional to the number of intervening sample points relative to the number of neighboring sample points for the other filter. The frequency response curve for the composite filter derived using the adjusted sampling rate may be more indicative of an idealized lowpass filter. The frequency response with the adjusted sampling rate may display a more bell-shaped characteristic compared with the frequency response without an adjusted sampling rate (shown in broken line detail).