A low-power clock buffer circuit is disclosed that reduces crowbar current and improves power efficiency across a wide range of supply voltages. The circuit comprises an input stage with current-limited PMOS and NMOS transistors, and an output inverter stage with split-gate drive. The input stage uses current sources to control the rise and fall times of signals driving the output inverter, creating a delay between the activation of the PMOS and NMOS transistors in the output stage. This delay minimizes the duration when both output transistors are simultaneously conducting, significantly reducing crowbar current. An alternative embodiment includes a current-starved latch in the output stage to mitigate floating node situations and enhance signal integrity. The circuit is suitable for clock distribution networks in large digital systems.