A device for synchronizing a periodic high frequency power signal (18) and an external reference signal (10). The device comprises a phase control circuit (100) and a digital oscillator circuit (130). The digital oscillator circuit (130) is connected to the phase control circuit (100). The digital oscillator circuit (130) comprises means for generating the periodic high frequency power signal (18) dependent on the control signal from the phase control circuit. The phase control circuit (100) is configured to determine a phase difference of the periodic high frequency power signal (18) and the external reference signal (10).

Systems, devices, and methods related to frequency converter arrangements are provided. For example, a frequency converter arrangement converts a first signal centered at a first frequency to a second signal centered at a second frequency different from the first frequency. The frequency converter arrangement includes local oscillator (LO) circuitry and in-phase, quadrature-phase (IQ) mixer circuitry coupled to the LO circuitry. The LO circuitry includes duty cycle correction circuitry to adjust a duty cycle of a pair of input clock signals. The duty cycle correction circuitry includes coarse tuning circuitry responsive to a digital calibration code, and analog tuning loop circuitry. The LO circuitry further includes quadrature divider circuitry coupled to an output of the duty cycle correction circuitry, where the quadrature divider circuitry generates an in-phase LO signal and a quadrature-phase LO signal from a pair of output clock signals at outputs of the duty cycle correction circuitry.

Systems, devices, and methods related to frequency converter arrangements are provided. For example, a frequency converter arrangement converts a first signal centered at a first frequency to a second signal centered at a second frequency different from the first frequency. The frequency converter arrangement includes local oscillator (LO) circuitry and in-phase, quadrature-phase (IQ) mixer circuitry coupled to the LO circuitry. The LO circuitry includes duty cycle correction circuitry to adjust a duty cycle of a pair of input clock signals. The duty cycle correction circuitry includes coarse tuning circuitry responsive to a digital calibration code, and analog tuning loop circuitry. The LO circuitry further includes quadrature divider circuitry coupled to an output of the duty cycle correction circuitry, where the quadrature divider circuitry generates an in-phase LO signal and a quadrature-phase LO signal from a pair of output clock signals at outputs of the duty cycle correction circuitry.

An apparatus includes a digitally controlled oscillator (DCO), which includes an inductor coupled in series with a first capacitor. The DCO further includes a second capacitor coupled in parallel with the series-coupled inductor and first capacitor, a first inverter coupled in parallel with the second capacitor, and a second inverter coupled back-to-back to the first inverter. The DCO further includes a digital-to-analog-converter (DAC) to vary a capacitance of the first capacitor.

An apparatus includes a digitally controlled oscillator (DCO), which includes an inductor coupled in series with a first capacitor. The DCO further includes a second capacitor coupled in parallel with the series-coupled inductor and first capacitor, a first inverter coupled in parallel with the second capacitor, and a second inverter coupled back-to-back to the first inverter. The DCO further includes a digital-to-analog-converter (DAC) to vary a capacitance of the first capacitor.

An apparatus includes a digitally controlled oscillator (DCO), which includes an inductor coupled in series with a first capacitor. The DCO further includes a second capacitor coupled in parallel with the series-coupled inductor and first capacitor, a first inverter coupled in parallel with the second capacitor, and a second inverter coupled back-to-back to the first inverter. The DCO further includes a digital-to-analog-converter (DAC) to vary a capacitance of the first capacitor.

An apparatus includes a digitally controlled oscillator (DCO), which includes an inductor coupled in series with a first capacitor. The DCO further includes a second capacitor coupled in parallel with the series-coupled inductor and first capacitor, a first inverter coupled in parallel with the second capacitor, and a second inverter coupled back-to-back to the first inverter. The DCO further includes a digital-to-analog-converter (DAC) to vary a capacitance of the first capacitor.

An apparatus includes a digitally controlled oscillator (DCO), which includes an inductor coupled in series with a first capacitor. The DCO further includes a second capacitor coupled in parallel with the series-coupled inductor and first capacitor, a first inverter coupled in parallel with the second capacitor, and a second inverter coupled back-to-back to the first inverter. The DCO further includes a digital-to-analog-converter (DAC) to vary a capacitance of the first capacitor.

An apparatus includes a digitally controlled oscillator (DCO), which includes an inductor coupled in series with a first capacitor. The DCO further includes a second capacitor coupled in parallel with the series-coupled inductor and first capacitor, a first inverter coupled in parallel with the second capacitor, and a second inverter coupled back-to-back to the first inverter. The DCO further includes a digital-to-analog-converter (DAC) to vary a capacitance of the first capacitor.

An oscillator circuit includes a current source, an oscillating section, a first capacitor, and a setting section. The current source is coupled to a connection node and causes a current having a current value based on an input voltage to flow from a first power node to the connection node. The oscillating section is on a current path between the connection node and a second power node. The oscillating section oscillates at an oscillation frequency based on a current flowing through the current path. The first capacitor is between the connection node and the second power node. The first capacitor has a capacitance that varies in accordance with a voltage at the connection node. The setting section that performs variation operation based on the voltage at the connection node. The variation operation is operation of varying an impedance between the connection node and the second power node.