An on-chip scope and a method for operating the on-chip scope. The on-chip scope includes a provision for operating in one of two states, the effects of voltage offsets being different in the two states. A first voltage is measured in the first state, a second voltage is measured in the second state, and the two measurements are combined to generate a voltage estimate in which the effects of voltage offsets are reduced.

An on-chip scope and a method for operating the on-chip scope. The on-chip scope includes a provision for operating in one of two states, the effects of voltage offsets being different in the two states. A first voltage is measured in the first state, a second voltage is measured in the second state, and the two measurements are combined to generate a voltage estimate in which the effects of voltage offsets are reduced.

A charge transfer digital-to-analog converter includes a differential reference voltage, a pair of capacitors, and switches including a shorting switch. The switches are configured to be switched in successive phases to generate a charge transfer through the capacitors to generate an output corresponding to a digital input. The specific switches activated and deactivated in each phase are selected according to the digital input. Each capacitor of the pair of capacitors is connected to a respective pin for the output. The shorting switch is configured to short the pair of capacitors to create a zero-differential charge on a first side of the capacitors. The shorting switch is implemented with a bootstrap circuit to maintain a constant common mode voltage of the first side of the capacitors while the shorting switch is activated.

A charge transfer digital-to-analog converter includes a differential reference voltage, a pair of capacitors, and switches including a shorting switch. The switches are configured to be switched in successive phases to generate a charge transfer through the capacitors to generate an output corresponding to a digital input. The specific switches activated and deactivated in each phase are selected according to the digital input. Each capacitor of the pair of capacitors is connected to a respective pin for the output. The shorting switch is configured to short the pair of capacitors to create a zero-differential charge on a first side of the capacitors. The shorting switch is implemented with a bootstrap circuit to maintain a constant common mode voltage of the first side of the capacitors while the shorting switch is activated.

A D/A converter for converting a digital signal with a predetermined number of bits to an analog signal, the D/A converter includes a plurality of component groups that include a plurality of components included in the D/A converter and are connected to an output unit for outputting the analog signal in a predetermined order; and a start position change unit that changes a start position within the plurality of the component groups used for generating a single analog signal by using a predefined shift pattern when generating the single analog signal corresponding to the digital signal.

A method of determining Integral Non-Linearity (INL) of an Analog-to-Digital Converter (ADC) is provided. The method includes providing an input signal to the ADC, phase-locking a clock signal of a clock of the ADC to the input signal, generating a plurality of samples at a sampled phase on the input signal for a plurality of sampled phases, applying averaging to the plurality of samples for each sampled phase to generate a reconstructed ADC output signal, and determining the INL of the ADC based on a comparison of the reconstructed ADC output signal to a theoretical ADC output signal.