A display device includes a display panel, a noise detection circuit and a processing circuit. The display panel has a touch control function and is configured to detect a contact location of an object to output a touch signal. The noise detection circuit is configured to detect and process a voltage signal of a common electrode of the display panel to output a free run signal and a noise sync signal. The processing circuit is configured to receive the free run signal and the noise sync signal. When the free run signal is at a first level, the processing circuit receives the touch signal in real-time. When the free run signal is at a second level different to the first level, the processing circuit receives the touch signal according to the noise sync signal. The present disclosure also provides a control method for the display device.

A system includes: a first temperature sensor configured to measure a first temperature of exhaust at a first location of an exhaust system of a vehicle; a second temperature sensor configured to measure a second temperature of exhaust at a second location of the exhaust system of the vehicle; a first analog to digital (A/D) converter configured to receive a first analog signal from the first temperature sensor, to sample the first analog signal to produce first samples, and to generate first digital values corresponding to the first temperature based on the first samples, respectively; and a second A/D converter a configured to receive a second analog signal from the second temperature sensor, to sample the second analog signal to produce second samples, and to generate second digital values corresponding to the second temperature based on the second samples, respectively.

A data acquisition system (DAS) for acquiring data from a Hall effect sensor includes one or more state variables, a multiplexer that periodically rotates a signal from the Hall effect sensor, and a controller that resets the one or more state variables in synchronization with rotation of the signal. The state variables may be digital states in a digital memory or voltages of capacitors the controller forces to a reset voltage. The state variables may be included in a noise-shaping SAR ADC, a delta-sigma ADC, a digital filter, an integrator, an analog filter, a VCO, an incremental ADC or an auxiliary ADC-assisted incremental ADC, or an auxiliary ADC of the DAS.

A system includes: a first temperature sensor configured to measure a first temperature of exhaust at a first location of an exhaust system of a vehicle; a second temperature sensor configured to measure a second temperature of exhaust at a second location of the exhaust system of the vehicle; a first analog to digital (A/D) converter configured to receive a first analog signal from the first temperature sensor, to sample the first analog signal to produce first samples, and to generate first digital values corresponding to the first temperature based on the first samples, respectively; and a second A/D converter a configured to receive a second analog signal from the second temperature sensor, to sample the second analog signal to produce second samples, and to generate second digital values corresponding to the second temperature based on the second samples, respectively.

An exemplary incremental two-step capacitance-to-digital converter (CDC) with a time-domain sigma-delta modulator (TDΔΣM) includes a voltage-controlled oscillator (VCO)-based integrator that can be used in a low-order loop configuration. Example prototypes are disclosed, which when fabricated in 40-nm CMOS technology, provides CDC resolution of 0.29 fF while dissipating only 0.083 nJ per conversion.

In an embodiment a sensor arrangement includes a pressure sensor realized as a capacitive pressure sensor, a capacitance-to-digital converter coupled to the pressure sensor and implemented as a delta-sigma analog-to-digital converter and a reference voltage generator having a control input configured to receive a control signal and an output configured to provide a reference voltage, wherein the output of the reference voltage generator is connected to an input of the capacitance-to-digital converter, wherein the reference voltage generator is configured to set a value of the reference voltage as a function of the control signal, and wherein at least two different values of the reference voltage have the same sign and different amounts.

An analog-to-digital converter comprises a first integrator (40), a first converter input (19), a first reference voltage input (34), a capacitor array (68) comprising capacitor elements (171), and a rotation frequency control unit (37) providing a rotation signal (SRO) with at least two different values of a rotation frequency (fR). A first subset of capacitor elements (171) of the capacitor array (68) is coupled to the first converter input (19) and to an input side of the first integrator (40) in a first phase and is coupled to the first reference voltage input (34) and to the input side of the first integrator (40) in a second phase as a function of the rotation signal (SRO).

According to an exemplary embodiment, a capacitively coupled continuous-time delta-sigma modulator includes an instrumentation amplifier amplifying an input voltage to an output voltage of a predetermined magnitude, a delta-sigma modulator outputting a bit signal quantized depending on a sampling frequency based on the output voltage and to convert the bit signal into a digital-to-analog conversion voltage, and a ripple reduction loop unit generating a demodulation voltage, in which a ripple is removed from the output voltage, depending on an RRL operating frequency to feed the demodulation voltage back to the instrumentation amplifier. The RRL operating frequency is equal to the sampling frequency.

An analog-to-digital converter comprises a first integrator (40), a first converter input (19), a first reference voltage input (34), a capacitor array (68) comprising capacitor elements (171), and a rotation frequency control unit (37) providing a rotation signal (SRO) with at least two different values of a rotation frequency (fR). A first subset of capacitor elements (171) of the capacitor array (68) is coupled to the first converter input (19) and to an input side of the first integrator (40) in a first phase and is coupled to the first reference voltage input (34) and to the input side of the first integrator (40) in a second phase as a function of the rotation signal (SRO).

A sigma-delta analog-to-digital converter includes: a subtractor for subtracting a feedback signal from an analog input signal; a loop filter for processing the output signal from the subtractor to generate a filtered signal; a signal comparing circuit for selectively operating in an offset detection mode or a signal comparison mode, wherein the signal comparing circuit generates an error signal irrelevant to the relative magnitude between the filtered signal and a reference signal in the offset detection mode, and generates a comparison signal corresponding to the relative magnitude between the filtered signal and the reference signal in the signal comparison mode; an offset calibration control circuit for calibrating the offset of the signal comparing circuit and for controlling the signal comparing circuit to alternately switch between the offset detection mode and the signal comparison mode; and a digital-to-analog converter for generating the feedback signal according to the comparison signal.