A method, system, and apparatus for determining delay between clocks, in response to a trigger event, buffering DSP symbol information in a symbol capture buffer; wherein the amount of DSP symbol information buffered corresponds to the amount of symbols captured during a buffer storage interval; and extracting a synchronization packet from the symbol capture buffer.

Methods and systems for parallel processing of batch communications during data validation using a plurality of independent processing streams. For example, the system may receive a plurality of communications for batch processing during a predetermined time period. The system may process, with a batch configuration file, a first alphanumeric data string of a first communication of the plurality of communications. The system may process, with the batch configuration file, a second alphanumeric data string of a second communication of the plurality of communications. The system may direct the first communication to a first micro-batch for processing within the predetermined time period based on the first metadata tag, wherein the first micro-batch is processed using a first validation and enrichment protocol and a first micro-batch configuration file, wherein the first validation and enrichment protocol and the first micro-batch configuration file are specific to the first source.

Apparatuses, methods, and systems for dynamically estimating a propagation time between a first node and a second node of a wireless network are disclosed. One method includes receiving, by the second node, from the first node a packet containing a first timestamp representing the transmit time of the packet, receiving, by the second node, from a local time source, a second timestamp corresponding with a time of reception of the first timestamp received from the first node, calculating a time difference between the first timestamp and the second timestamp, storing the time difference between the first timestamp and the second timestamp, calculating a predictive model for predicting the propagation time based the time difference between the first timestamp and the second timestamp, and estimating the propagation time between the first node and the second node at a time by querying the predictive model with the time.

A clock synchronization method includes receiving, by a receiving apparatus, a plurality of data blocks using a plurality of physical layer modules (PHYs), where the plurality of data blocks include a plurality of head data blocks, performing, by the receiving apparatus, timestamp sampling on the plurality of data blocks to generate a plurality of receipt timestamps, aligning, by the receiving apparatus, the plurality of receipt timestamps using a first receipt timestamp as a reference, generating, by the receiving apparatus, a clock synchronization packet based on the plurality of data blocks, and writing, by the receiving apparatus, a value of a second receipt timestamp into the clock synchronization packet, where the second receipt timestamp is a receipt timestamp that is of a second data block and that is determined based on the plurality of aligned receipt timestamps.

A transmitting system includes an outputting apparatus and a multiplexing apparatus. The outputting apparatus transmits MMTP packets to which an NTP short format timestamp is added. The multiplexing apparatus multiplexes the MMTP packets. The multiplexing apparatus includes an extractor, a controller, a determiner, a management information generator, a continuity determiner, and a transmission timing adjuster. The transmission timing adjuster writes, for adjustment of a transmission timing of an MMTP packet being close to an MMTP packet in which an NTP short format timestamp value is discontinuous, time information taking a leap second processing into consideration, to the NTP short format timestamp of the MMTP packet.

A network device comprises a network interface configured to transmit packets via a network link, and timestamp circuitry configured to modify a packet that is to be transmitted by the network interface circuitry by embedding a future timestamp in the packet. The future timestamp corresponds to a transmit time at which the packet is to be transmitted by the network interface circuitry, and the transmit time occurs after the timestamp circuitry embeds the timestamp in the packet. Time gating circuitry is configured to i) receive the packet, ii) determine when a current time indicated by a clock circuit reaches the transmit time, iii) hold the packet from proceeding to the network interface circuitry prior to the current time reaching the transmit time, and iv) release the packet in response to the current time reaching the transmit time.

An aggregate cell of a cellular network includes a plurality of dispersed modular cells. The modular cells each include a cellular radio and collectively perform the function of a cellular base station. A distributed clock is established by transmitting timing beacons from one or more of the modular cells. Each modular cell receives the timing beacons. Each modular cell that transmits a timing beacon provides a transmission timestamp to a cell controller. Each modular cell that receives a timing beacon provides a reception timestamp to the cell controller. The cell controller schedules signal transmissions from the modular cells based on the transmission and reception timestamps.

A bridge element is provided for establishing clock synchronization across network elements including a first network element using a first clock synchronization transport protocol and a second network element using a second clock synchronization transport protocol different from the first clock synchronization transport protocol. The bridge element includes a port, a protocol translation port and an interconnect structure. The port may receive a clock synchronization signal from the first network element using the first clock synchronization protocol. The interconnect structure may receive the clock synchronization signal from the port. The protocol translation port may receive the clock synchronization signal from the interconnect structure, translate the clock synchronization signal between the first clock synchronization transport protocol and the second clock synchronization transport protocol, and provide the translated clock synchronization signal to the second network element using the second clock synchronization protocol.

A method and system for the post-adjustment (i.e., offline) of event timestamps to implement virtual time synchronization amongst detection node clocks. In existing methodologies with the goal of clock synchronization, clocks (and timestamps generated therefrom) are disciplined or adjusted at the recordation time of the events on a detection node (e.g., a switch/router, an Internet-of-Things (IoT) device, a wireless sensor, etc.). However, there is no particular reason for these clocks or timestamps to be accurate during the recordation time, but rather, should be accurate at their use or interpretation time. Further, through these recordation time adjustments, clock drifts and timing errors may be gradually introduced, leading to runaway inaccuracies. The disclosed method and system intentionally avoids the disciplining of clocks at event recordation times on the detection node and, instead, adjusts timestamps during interpretation times, to overcome the aforementioned issues.

The present disclosure relates to a method (400) for determining a clock frequency offset between a first device having a first clock and at least one second device having at least one second clock, the method comprising: receiving (401), by the at least one second device, at least one first message from the first device, wherein information regarding a time of departure of the at least one first message is in the at least one first message; determining (402), by the at least one second device, a time of arrival of the at least one first message; receiving (403), by the at least one second device, at least one second message from the first device, wherein information regarding a time of departure of the at least one second message is in the at least one second message; determining (404), by the at least one second device, a time of arrival of the at least one second message; and determining (405) a clock frequency offset between the first clock and the at least one second clock based on the time of departure of the at least one first message, the time of arrival of the at least one first message, the time of departure of the at least one second message, and the time of arrival of the at least one second message.

The disclosure further relates to a corresponding apparatus, system, computer program product and a computer readable storage medium.