A clock synchronization method includes receiving, by a receiving apparatus, a plurality of data blocks using a plurality of physical layer modules (PHYs), where the plurality of data blocks include a plurality of head data blocks, performing, by the receiving apparatus, timestamp sampling on the plurality of data blocks to generate a plurality of receipt timestamps, aligning, by the receiving apparatus, the plurality of receipt timestamps using a first receipt timestamp as a reference, generating, by the receiving apparatus, a clock synchronization packet based on the plurality of data blocks, and writing, by the receiving apparatus, a value of a second receipt timestamp into the clock synchronization packet, where the second receipt timestamp is a receipt timestamp that is of a second data block and that is determined based on the plurality of aligned receipt timestamps.

Embodiments of this application disclose a data transmission time obtaining method, apparatus, and system. The method includes: A first device sends a first packet to a second device, and obtains a first send timestamp of the first packet; the first device receives a second packet that is sent by the second device and that corresponds to the first packet, and obtains a first receive timestamp of the second packet; the first device calculates, based on timing frequency of the second device, a second receive timestamp at which the second device receives the first packet and a second send timestamp at which the second device sends the second packet; and the first device calculates a data transmission time between the first device and the second device based on the first send timestamp, the first receive timestamp, the second send timestamp, and the second receive timestamp.

A system (100) comprising: a first unit (104) and one or more second units (104). The first unit (102) comprises: a timing reference (114) configured to provide a master-timing-reference-signal; a master time block configured to provide a master-time-signal (117) for the first unit (102) based on the master-timing-reference-signal; and a first interface (122) configured to: receive timestamped-processed-second-RF-signals from the one or more second units (104); and provide a first-unit-timing-signal (262) to the one or more second units (104) based on the master-time-signal. The one or more second units (104) each comprise: a slave time block (141) configured to: determine a slave-time-signal (142) for the second unit (104) based on the master-timing-reference-signal; determine one or more second-timing-values based on the slave-time-signal; determine an adjustment-time based on the first-unit-timing-signal received from the first unit (102) and the second-timing-values; and adjust the slave-time-signal based on the adjustment-time.

A communication system and a communication method for one-way transmission are provided. The communication method includes: receiving, by a router, a first synchronization message from a grandmaster clock; generating, by the router, a timestamp according to the first synchronization message; receiving, by the router, at least one data packet; transmitting, by the router, the at least one data packet and the timestamp to a programmable logic device; and outputting, by the programmable logic device, the at least one data packet and the timestamp.

A method for determining a sending period of a packet in a deterministic network and an apparatus are disclosed. The method includes: receiving a first packet; determining a first period, where the first period is a sending period of the first packet; determining timestamp information of the first packet based on the first period, where the timestamp information is used to indicate a time difference between a first time and a second time, the first time is a time at which the first packet starts to be sent in the first period, and the second time is a start time of the first period; encapsulating the timestamp information into the first packet to obtain a second packet; and sending the second packet.

The present technology proposes techniques for generating globally coherent timestamps. This technology may allow distributed systems to causally order transactions without incurring various types of communication delays inherent in explicit synchronization. By globally deploying a number of time masters that are based on various types of time references, the time masters may serve as primary time references. Through an interactive interface, the techniques may track, calculate and record data relative to each time master thus providing the distributed systems with causal timestamps.

A method and system for the post-adjustment (i.e., offline) of event timestamps to implement virtual time synchronization amongst detection node clocks. In existing methodologies with the goal of clock synchronization, clocks (and timestamps generated therefrom) are disciplined or adjusted at the recordation time of the events on a detection node (e.g., a switch/router, an Internet-of-Things (IoT) device, a wireless sensor, etc.). However, there is no particular reason for these clocks or timestamps to be accurate during the recordation time, but rather, should be accurate at their use or interpretation time. Further, through these recordation time adjustments, clock drifts and timing errors may be gradually introduced, leading to runaway inaccuracies. The disclosed method and system intentionally avoids the disciplining of clocks at event recordation times on the detection node and, instead, adjusts timestamps during interpretation times, to overcome the aforementioned issues.

In certain embodiments, a communication network has a specialized ingress node that converts one or more incoming flows into a single, packetized, time-division multiplexed (TDM) flow; a switch fabric that routes the TDM flow via a fixed path through the switch fabric in a contention-free manner; and a specialized egress node that converts the TDM flow received from the switch fabric into one or more outgoing flows corresponding to the one or more incoming flows. The technology turns legacy, best-effort packet-switching into deterministic circuit-switching for a programmable selection of flows with minimal impact on network dynamics and at relatively low cost.

Techniques to facilitate synchronization of industrial assets in an industrial automation environment are disclosed herein. In at least one implementation, a computing system receives time-series industrial process data associated with a plurality of process subsystems of an industrial automation process. The time-series industrial process data is fed into a machine learning model associated with the industrial automation process to dynamically generate a process duration prediction for a first one of the process subsystems and responsively determine an updated set point for a second one of the process subsystems based on the process duration prediction for the first one of the process subsystems. The updated set point for the second one of the process subsystems is provided to an industrial controller associated with the second one of the process subsystems.

In a method of guaranteeing a jitter upper bound for a network without time-synchronization, which guarantees a jitter upper bound for a flow that is transmitted from a source to a destination through a network, the network guarantees a latency upper bound of the flow, a buffer located between the network and the destination holds a packet of the flow for a predetermined buffer holding interval and then outputs, and the jitter upper bound is set to an arbitrary value including 0 (zero).