Apparatuses, methods, and systems are disclosed for rate-matching a data transmission around resources. One method includes: receiving a downlink control channel (DCC) transmission in a predetermined time period; determining a first DCC candidate (DCCC) based on the downlink control channel transmission; determining whether the first DCCC belongs to a plurality of DCCCs associated with the DCC transmission, wherein the plurality of DCCCs carry the same downlink control information (DCI); in response to determining that the first DCCC belongs to the plurality of DCCCs: determining a second DCCC; and determining the DCI by decoding the first and the second DCCCs; in response to determining that the first DCCC does not belong to the plurality of DCCCs: determining the DCI by decoding the first DCCC; and determining downlink resources corresponding to a data transmission; and rate-matching the data transmission.

Transmitting apparatus and receiving apparatus for communication systems using coded orthogonal frequency-division multiplexed (COFDM) dual-subcarrier modulation (DCM) signals. The same coded data is mapped both to COFDM subcarriers located in the lower-frequency half spectrum of the DCM signal and to COFDM subcarriers located in its upper-frequency half spectrum. The mapping of COFDM subcarriers in those half spectra employ labeling diversity preferred for reception of DCM with less error when accompanied by interfering additive white Gaussian noise (AWGN). In preferred forms of COFDM DCM signal, the quadrature amplitude modulation (QAM) of COFDM subcarriers is Gray mapped to position palindromic lattice-point labels along one of the diagonals of each square QAM constellation.

Methods, systems, and devices for wireless communication are described. In some wireless communications systems, a wireless device may identify a set of at least two wireless communications channels that are available for communication with another wireless device. In some examples, the wireless device may identify at least one channel of the set, and may select integrity check information that indicates the identified wireless channel(s) that are available. The wireless device may then transmit the integrity check information during a first time period. In some examples, a wireless device may receive wireless communication that includes integrity check information on a subset of channels. The wireless device may then determine, based on the integrity check information, whether the identified subset of channels is the same as the actual subset of channels used for transmission of the wireless communications.

A transmitter, including a signal processor programmed to generate, based on input serial data, for each of an integer number of subcarriers mutually orthogonal to each other, a respective first parallel data stream. The signal processor is further programmed to modulate each of the integer number of subcarriers respectively with the respective parallel stream to generate the integer number of data-modulated subcarriers. The signal processor is further programmed to modulate a single carrier occupying a same bandwidth as the integer number of subcarriers with a unique word and one or more pilot symbols to generate a second signal. The signal processor combines the first signal and second signal to generate a third signal. The signal processor generates an output signal by applying a transmit filter to the third signal.

Disclosed are techniques for wireless communication. In an aspect, a wireless communications device transmits a first set of symbols of a plurality of symbols of a data stream using a first set of constellation points of a pi/N-based modulation scheme, and transmits a second set of symbols of the plurality of symbols using a second set of constellation points of the pi/N-based modulation scheme, wherein each of the first set of constellation points and the second set of constellation points consists of M constellation points, wherein the second set of constellation points is rotated from the first set of constellation points by pi/N, wherein symbols of the first set of symbols alternate with symbols of the second set of symbols, and wherein M is greater than 8.

A digital signal up-converting apparatus includes: a clock generating circuit arranged to generate a reference clock signal; an adjusting circuit coupled to the clock generating circuit and arranged to generate a first clock signal and a second clock signal according to the reference clock signal; a baseband circuit coupled to the adjusting circuit for receiving the first clock signal, wherein the baseband circuit further generates a digital output signal according to the first clock signal; and a sampling circuit coupled to the adjusting circuit and the baseband circuit for receiving the second clock signal and the digital output signal, wherein the second clock signal and the digital output signal are non-overlapping; wherein the sampling circuit samples the digital output signal based on the second clock signal and then combines the sampled digital output signal in order to generate a combined digital signal.

One disclosure of the present specification provides a method for mapping data symbols in a wireless communication system. The method comprises the steps of: generating a first symbol sequence in which first symbols among data symbols to be transmitted are consecutively arranged; generating a second symbol sequence in which second symbols among the data symbols are consecutively arranged; and performing modulation of the first and second symbol sequences, wherein the step of performing modulation may be a phase rotation on the boundary of the first symbol sequence and the second symbol sequence.

A switching power amplifier includes: a first transistor controlled by a first digital signal to selectively output a first output signal; a second transistor controlled by a second digital signal to selectively output a second output signal; and a control circuit arranged to generate the second digital signal according to the first digital signal and a third digital signal; wherein the first output signal and the second output signal are outputted on a common connected node of the first transistor and the second transistor.

A digital signal up-converting apparatus includes: a clock generating circuit arranged to generate a reference clock signal; an adjusting circuit coupled to the clock generating circuit and arranged to generate a first clock signal and a second clock signal according to the reference clock signal; a baseband circuit coupled to the adjusting circuit for receiving the first clock signal, wherein the baseband circuit further generates a digital output signal according to the first clock signal; and a sampling circuit coupled to the adjusting circuit and the baseband circuit for receiving the second clock signal and the digital output signal, wherein the second clock signal and the digital output signal are non-overlapping; wherein the sampling circuit samples the digital output signal based on the second clock signal and then combines the sampled digital output signal in order to generate a combined digital signal.

An optical transceiver of a flexible modulation format. The optical transceiver may include an optical transmitter to convert an electrical signal to an optical signal and transmit the optical signal, an optical receiver to receive and convert the optical signal to an electrical signal, and a controller to set modulation formats of the optical transmitter and the optical receivers according to modulation format information.