Patent classifications
H04L27/368
Voltage memory digital pre-distortion circuit
An envelope tracking (ET) amplifier circuit is provided. The voltage mDPD circuit is provided in an ET amplifier circuit and configured to determine a voltage deviation relative to an ET modulated target voltage signal, execute an mDPD polynomial in one or more iterations to extract an mDPD coefficient(s), and adjust a time-variant target voltage envelope of the ET modulated target voltage signal based on the mDPD coefficient(s) extracted in each of the mDPD iterations to reduce the voltage deviation to a predefined threshold. By reducing the voltage deviation in the ET modulated voltage, it is possible improve linearity (e.g., gain linearity) of the ET amplifier circuit, which can lead to reduced power consumption and improved radio frequency (RF) performance.
Performing lookup table operations on a single-instruction multiple data processor
In accordance with at least one embodiment, a processor system is disclosed having a SIMD processor device that has a plurality of subsidiary processing elements that are controlled to process multiple data concurrently. In accordance with at least one embodiment, the SIMD processor is a vector processor (VPU) having a plurality of vector Arithmetic Units (AUs) as subsidiary processing elements, and the VPU executes an instruction to transfer table information from a global memory of the VPU to a plurality of local memories accessible by each AU. The VPU also executes an instruction that results in each processing element performing a table lookup from a table stored at its local memory. In response to the instruction, this table lookup uses a portion of a lookup value to access information from the table, and uses another portion of the lookup information to calculate an interpolated resultant based upon the accessed information.
System and method for increasing bandwidth for digital predistortion in multi-channel wideband communication systems
A method of operating a communications system includes receiving a signal at a digital predistorter (DPD), introducing predistortion to the signal using the DPD, and converting the predistorted signal to an analog signal using a digital-to-analog converter having a first bandwidth. The method also includes amplifying the analog signal, sampling the amplified signal using an analog-to-digital converter having a second bandwidth less than the first bandwidth, and extracting coefficients of the DPD from the sampled signal.
Polar transmitter with tunable matching network
A polar transmitter includes an amplitude path comprising an amplitude signal that corresponds to an amplitude of a vector sum of an in-phase input signal and a quadrature input signal; a phase path comprising a phase modulator configured to phase-modulate a phase signal that corresponds to the phase of the vector sum of the in-phase input signal and the quadrature input signal; a digital power amplifier (DPA) configured to amplify the phase-modulated (PM) input signal based on the amplitude signal; a tunable matching network coupled to an output of the DPA and configured to adjust a load impedance of the DPA; and a controller configured to adjust the matching network based on a look-up table with respect to amplitude and frequency information, where the look-up table indicates a plurality of optimal operation modes of the matching network for specific combinations of amplitude and frequency information.
Method of signal generation and signal generating device
A transmission method simultaneously transmitting a first modulated signal and a second modulated signal at a common frequency performs precoding on both signals using a fixed precoding matrix and regularly changes the phase of at least one of the signals, thereby improving received data signal quality for a reception device.
METHOD AND APPARATUS FOR DIGITAL PRE-DISTORTION WITH REDUCED OVERSAMPLING OUTPUT RATIO
Certain aspects of the present disclosure are directed to a digital predistortion (DPD) device for use within a wireless transmitter that permits the use of a downstream digital-to-analog converter that operates at a clock rate close to the bandwidth of a digital baseband input signal. In some examples, a sampling rate of a digital baseband input signal is increased using an upsampler to obtain an increased rate digital input signal. Predistortion is applied to the increased rate digital input signal using a DPD device to obtain a predistorted digital signal. The sampling rate of the predistorted digital signal is then decreased using a downsampler to obtain a lower-rate predistorted digital signal with a sampling rate below the increased rate of the upsampler (e.g. close to the bandwidth of a digital baseband input signal). A low pass filter may be provided to filter out-of-band signal components from the predistorted digital signal.
Wireless device and method for controlling phase
A wireless device includes a plurality of antenna and a plurality of wireless modules that transmit or receive signals via the plurality of antennas. Each of the plurality of wireless modules includes: a generator that generates a high-frequency signal; and a high-frequency circuit that transmits or receives, based on the generated high-frequency signal, a signal via at least one of the plurality of antennas. The wireless device further includes a controller. The controller obtains, each time the plurality of wireless modules start generation of a plurality of the high-frequency signals, a difference of phases of the plurality of high-frequency signals, and controls, based on the obtained difference, at least one phase of a plurality of signals to be transmitted or received by the plurality of wireless modules.
Stabilization of direct learning algorithm for wideband signals
The present invention addresses method, apparatus and computer program product for stabilization of the direct learning algorithm for wideband signals. Thereby, a signal to be amplified is input to a pre-distorter provided for compensating for non-linearity of the power amplifier, and the pre-distorted output signal from the pre-distorter is forwarded to the power amplifier. Parameters of the pre-distorter are adapted based on an error between the linearized signal output from the power amplifier and the signal to be amplified using an adaptive direct learning algorithm, and the linear system of equations formed by the direct learning algorithm are solved using a conjugate gradient algorithm, wherein, once per direct learning algorithm adaptation, at least one of the initial residual and the initial direction of the conjugate gradient algorithm are set based on the result of the previous adaptation.
VOLTAGE MEMORY DIGITAL PRE-DISTORTION CIRCUIT
An envelope tracking (ET) amplifier circuit is provided. The voltage mDPD circuit is provided in an ET amplifier circuit and configured to determine a voltage deviation relative to an ET modulated target voltage signal, execute an mDPD polynomial in one or more iterations to extract an mDPD coefficient(s), and adjust a time-variant target voltage envelope of the ET modulated target voltage signal based on the mDPD coefficient(s) extracted in each of the mDPD iterations to reduce the voltage deviation to a predefined threshold. By reducing the voltage deviation in the ET modulated voltage, it is possible improve linearity (e.g., gain linearity) of the ET amplifier circuit, which can lead to reduced power consumption and improved radio frequency (RF) performance.
IMAGE DISTORTION CORRECTION IN A WIRELESS TERMINAL
A circuit in a wireless communications terminal/device and a method is described for reducing an image distortion. By measuring three gain mismatches of I path and Q path of a transceiver, and estimating a value of an IQ mismatch coefficient based on the three gain mismatches; and applying a measurement adjustment to the I path or the Q path based on the value of the IQ mismatch coefficient, the image distortion is reduced.