Methods and apparatus for providing a demapping system with phase compensation to demap uplink transmissions. In an embodiment, a method is provided that includes detecting a processing type associated with a received uplink transmission, and when the detected processing type is a first processing type then performing the following operations: removing resource elements containing reference signals from the uplink transmission; layer demapping remaining resource elements of the uplink transmission into two or more layers; phase compensating all layers to generate phase compensated layers; and soft-demapping all phase compensated layers to produce phase compensated soft-demapped bits.

A UE determines a respective set of subcarriers from N subcarriers in each OFDM symbol of M1 consecutive OFDM symbols within a slot. The respective set of subcarriers carries a respective set of SRSs that form transmission combs of a transmission comb size. The respective set of subcarriers in one of the M1 consecutive OFDM symbols do not overlap in frequency domain with the respective set of subcarriers in any other one of the M1 consecutive OFDM symbols. The UE applies the respective set of phase rotations to the respective set of SRSs in each OFDM symbol to obtain a cyclic shift. The UE maps the respective set of SRSs applied with phase rotations to the respective set of subcarriers in each OFDM symbol. The UE transmits the respective sets of SRSs in the M OFDM symbols.

A method, an apparatus and a computer program product for enhancing reception of signals in a wireless communication system. A signal containing a frame including a plurality of symbols is received on an uplink communication channel. An angular position of at least one symbol in the plurality of symbols in a constellation of symbols is detected. The plurality of symbols include equalized symbols. An angular difference corresponding a phase error between the detected angular position of the symbol and an expected reference angular position in the constellation of symbols corresponding to an expected reference symbol corresponding to the received frame is determined. Using the determined phase error, a phase of the symbol is compensated.

Methods, systems, and devices for wireless communications are described. A phase rotation adjustment may be applied in cases where a transmitted signal is heterodyned. For instance, a device (e.g., a base station, a user equipment (UE), a wireless repeater) may determine that a receiving device may receive a transmitted signal at a carrier frequency that is different from a carrier frequency used by a transmitting device (e.g., such as in the case of a wireless repeater relaying the signal from the transmitting device to the receiving device). A phase rotation adjustment may be applied by the device (e.g., the base station, UE, or wireless repeater) to account for the heterodyning. The phase rotation adjustment may be based on the carrier frequency used by the receiving device to receive the signal. In some cases, a receiving device may also apply the phase rotation adjustment following the demodulation of a received signal.

A method of demodulating a signal that is phase modulated to convey R chips having phase transitions between adjacent ones of the R chips to represent chip states, and an overlay symbol spanning the R chips, wherein R>1, and wherein the phase transitions are rotated in a same direction according to an overlay symbol state, comprises: first processing the signal including: accumulating a respective phase of each chip into a respective first chip magnitude, to produce R first chip magnitudes; and accumulating the R first chip magnitudes to produce a first magnitude; second processing the signal including: accumulating a respective phase of each chip into a respective second chip magnitude, to produce R second chip magnitudes; and accumulating the R second chip magnitudes to produce a second magnitude; and determining the overlay symbol state based on the first magnitude and the second magnitude.

A signal calibration circuit including a first phase interpolator, a second phase interpolator, a phase detector, a control circuit and a delay circuit is provided according to an exemplary embodiment of the disclosure. The first phase interpolator is configured to receive a plurality of first signals and generate a plurality of first quadrature signals according to the first signals. The second phase interpolator is configured to generate a second signal according to the first quadrature signals. The phase detector is configured to detect a phase difference between the second signal and one of the first signals. The control circuit is configured to generate a calibration parameter according to the phase difference. The delay circuit is configured to adjust at least one of the first signals according to the calibration parameter, such that the adjusted first signal includes a plurality of second quadrature signals.

A signal calibration circuit including a first phase interpolator, a second phase interpolator, a phase detector, a control circuit and a delay circuit is provided according to an exemplary embodiment of the disclosure. The first phase interpolator is configured to receive a plurality of first signals and generate a plurality of first quadrature signals according to the first signals. The second phase interpolator is configured to generate a second signal according to the first quadrature signals. The phase detector is configured to detect a phase difference between the second signal and one of the first signals. The control circuit is configured to generate a calibration parameter according to the phase difference. The delay circuit is configured to adjust at least one of the first signals according to the calibration parameter, such that the adjusted first signal includes a plurality of second quadrature signals.

A modem circuit associated with a communication system is disclosed. The modem circuit comprises a symbol tracking circuit configured to track a symbol timing associated with a downstream (DS) channel associated with the modem circuit, in accordance with a timing offset estimate. In some embodiments, the timing offset estimate comprises a unified timing offset derived based on one or more external channels associated with the modem circuit that is different from the DS channel. The symbol tracking circuit is further configured to apply a sample rate correction to a DS signal associated with the DS channel, based on the timing offset estimate comprising the unified timing offset, and apply a frequency correction to the DS signal, based on a frequency offset estimate comprising a unified frequency offset derived based on the one or more external channels.

According to one embodiment, a transmission device includes an insertion unit, an allocation unit, a division unit, an IFFT unit, a phase rotation unit, and a transmission unit. The phase rotation unit performs a phase rotation to reduce a PAPR characteristic for each block on which inverse fast Fourier transform has been performed. The transmission unit combines transmission signals, on each of which a phase rotation has been performed by the phase rotation unit, and transmits the combined transmission signal to an external device. In addition, the division unit includes a predetermined band and at least one pilot symbol located outside another of end of this predetermined band on an opposite side of the one end into one block.

A digital triggering system for processing data relating to a signal received is described, with an analog-to-digital converter, an IQ data source providing IQ data, a first digital signal processor, and at least a second digital signal processor. The first digital signal processor is connected with the IQ data source via a first signal path. The second digital signal processor is connected with the IQ data source via a second signal path. The first digital signal processor has at least a first signal processing parameter. The second digital signal processor has at least a second signal processing parameter. The first signal processing parameter and the second signal processing parameter are independent from each other. The first digital signal processor generates a trigger signal based upon a characteristic of the IQ data obtained from the IQ data source. The first digital signal processor triggers the second digital signal processor via the trigger signal to acquire IQ data obtained from the IQ data source. Further, a method for processing data is described.