H05K1/0221

Capacitive compensation for vertical interconnect accesses

Multiple designs for a multi-layer circuit may be simulated to determine impedance profiles of each design, allowing a circuit designer to select a design based on the impedance profiles. One feature that can be modified is the structure surrounding the barrels of a differential VIA on layers that are not connected to the differential VIA. Specifically, one antipad can be used that surrounds both barrels or two antipads can be used, with one antipad for each barrel. Additionally, the size of the antipad or antipads can be modified. These modifications affect the impedance of the differential VIA. Additionally, a conductive region may be placed that connects to the VIA barrel even though the circuit on the layer does not connect to the VIA. This unused pad, surrounded by a non-conductive region, also affects the impedance of the differential VIA.

ELECTRONIC DEVICE COMPRISING ANTENNA MODULE

An electronic device is provided, which includes a housing; a first plate placed on the front side of the housing; a second plate placed on the rear side of the housing; and an antenna module arranged between the first plate and the second plate. The antenna module includes a first PCB; a second PCB having a material different from that of the first PCB and at least partially coupled to one surface of the first PCB in an overlap area; a first conductive line included in the first PCB; a second conductive line included in the second PCB; a first conductive pattern arranged on the second PCB and connected to the second conductive line; a first connection member for connecting the first conductive line and the second conductive line in the overlap area; and a second connection member for coupling the first PCB and the second PCB in the overlap area.

COAXIAL THRU-VIA CONDUCTOR CONFIGURATIONS IN ELECTRONIC PACKAGING SUBSTRATES
20220071009 · 2022-03-03 ·

A coaxial thru-via conductor and a method of fabricating the coaxial thru-via conductor can provide enhanced operations for semiconductor devices mounted on a substrate.

Electronic substrate having differential coaxial vias

An electronic substrate includes a dielectric core, a first conducting layer on a first side of the core and a second conducting layer on the second side of the core opposite the first side. At least one differential coaxial through-via includes a first inner signal through-via that is at least electrical conductor lined for a first signal path and at least a second inner signal through-via that is also at least electrical conductor lined positioned side-by-side and being dielectrically isolated from the first inner signal through-via for a second signal path. An annular-shaped outer ground shield enclosure is at least conductor lined that surrounds and is dielectrically isolated from both the first and second inner signal through-vias.

Via-less patterned ground structure common-mode filter

Disclosed herein are multi-layer metal circuits, such as printed circuit boards (PCBs), with single-sided, partially-shielded, or fully-shielded via-less common-mode filters. The multi-layer metal circuits comprise at least one shield layer, at least one signal trace, and at least one reference layer (e.g., ground). The reference layer comprises a pattern of the via-less common-mode filter. The pattern may comprise, for example, a single piece-wise linear segment, or two or more disjoint and non-intersecting segments (which may be strictly linear or piece-wise linear). The reference layer is electrically isolated from the shield layer, and thus the via-less common-mode filters do not require vias. In addition to being used in PCBs, the disclosed multi-layer metal circuits may also be used in other applications, such as integrated circuits (e.g., implemented in semiconductor chips).

Package to printed circuit board transition
11147161 · 2021-10-12 · ·

Package to printed circuit board (PCB) transitions are described. In one aspect, a multi-layer PCB includes an external layer having a transition region configured to receive an electrical component and a clear routing region outside of the transition region. The PCB includes first via(s) that extend from the transition region to an inner trace routing layer. The trace routing layer is disposed between the external layer and the second inner trace routing layer. The first inner trace routing layer includes a transition area disposed under the transition region of the external layer, a clear routing area outside of the transition region, and a transmission line that connects a given first via to a second via for a second electrical component. The transmission line includes conductive trace(s) that each have a first width in the transition area and a second width, greater than the first width, in the clear routing area.

Flexible circuit board and method for manufacturing the same

A flexible circuit board capable of transmitting high frequency signals with reduced attenuation includes two outer wiring boards enclosing an inner wiring board. The inner wiring board includes a first conductive wiring layer and a first substrate layer. The first conductive wiring layer includes a signal line and two ground lines on both sides of the signal line. The first substrate layer covers a side of the first conductive wiring layer and defines first through holes which expose the signal line. Each of the two outer wiring boards includes a second substrate layer and a second conductive wiring layer. The second substrate layer abuts the inner wiring board and defines second through holes aligning with the first through holes, to partially surround the signal line with air of very low dielectric constant. A method for manufacturing the flexible circuit board is also disclosed.

PRINTED CIRCUIT BOARD INCLUDING GROUND LINE FOR CANCELING ELECTROMAGNETIC WAVES GENERATED BY POWER LINE, AND ELECTRONIC DEVICE INCLUDING SAME
20210298165 · 2021-09-23 ·

A printed circuit board according to various embodiments of the present disclosure can include a first substrate layer, a dielectric layer stacked below the first substrate layer, and a second substrate layer stacked below the dielectric layer. The second substrate layer can include: a power line; a ground part disposed to have an isolated area along the power line; and a ground line which extends from the ground part so as to be disposed in the isolated area, and which separates the isolated area into a first area and a second area so as to generate electromagnetic waves for canceling the electromagnetic waves generated by a current flowing through the power line. Other embodiments are also possible.

TRANSMISSION LINE SUBSTRATE AND ELECTRONIC DEVICE

A transmission line substrate includes a stacked body that includes insulating base materials, first and second signal lines, and first and second ground conductors. The second signal line is provided on a layer different from the layer of the first signal line and extends in parallel with the first signal line. The first ground conductor is provided on the same layer as the layer of the second signal line and overlapped with the first signal line when viewed in the Z-axis direction. The second ground conductor is provided on the same layer as the layer of the first signal line and overlapped with the second signal line when viewed in the Z-axis direction. A first transmission line includes the first signal line, the first ground conductor, and an insulating base material, and a second transmission line includes the second signal line, the second ground conductor, and the insulating base material.

ANTENNA COMPONENT
20210234252 · 2021-07-29 ·

An apparatus is disclosed comprising first printed circuit board—PCB—and second PCB structure each having a first surface and a second surface and a layer of electrically conductive material on the first surface thereof and being attached to each other in a substantially parallel configuration. A stripline is positioned between the two PCBs. Each one of the first PCB and the second PCB has a plurality of via-holes that are electrically conductive and are connected at one end to the layer of electrically conductive material on the first surface and to an electrically conductive pad on the second surface of the PCB. At least a first electrically conductive pad associated with the first PCB is located in proximity with a first electrically conductive pad associated with the second PCB thereby forming a capacitive configuration.