Patent classifications
H05K1/0222
SUBSTRATE, CHIP, CIRCUIT PACKAGE AND FABRICATION PROCESS
A substrate, a chip, a circuit package and a process of fabricating a substrate are presented. The substrate is provided between an integrated circuit and a printed circuit board, and comprises a core insulating and a buildup insulating layer. The first plated through hole is operable to provide ground through from the printed circuit board to the integrated circuit. The second plated through hole is operable to provide electrical communication carrying signals or power between the integrated circuit and the printed circuit board through the buildup insulating layers. The first plated through hole is formed in tubular shape defined an outer wall and an inner wall, and the second plated through hole is formed in the inner wall and is insulated with the first plated through hole.
Circuit grouping systems and methods
Installation of electrical systems can require a large amount of branch circuits that can lead to a labeling degeneracy that can require a customized on-site tagging step to identify each conductor to be installed, or cause technicians to install additional circuit housing runs to circumvent the degeneracy. Circuit grouping systems and methods, and circuit installation methods, are disclosed herein that prevent such inefficiencies.
Circuit board connector footprint
A printed circuit board includes a layered substrate having a plurality of layers having an electrical connector footprint configured to receive an electrical connector. The printed circuit board includes pair anti-pads passing through the layered substrate around pairs of signal vias. The printed circuit board includes ground vias passing through the layered substrate. The ground vias are configured to receive ground pins of the electrical connector. The ground vias are located outside of the pair anti-pads. The printed circuit board includes SI vias passing through the layered substrate. The SI vias form an SI fence surrounding the corresponding pair anti-pad.
HIGH DENSITY MICROWAVE HERMETIC INTERCONNECTS FOR QUANTUM APPLICATIONS
A quantum computer includes a refrigeration system under vacuum including a containment vessel, a qubit chip contained within a refrigerated vacuum environment defined by the containment vessel. The quantum computer further includes a plurality of interior electromagnetic waveguides and a plurality of exterior electromagnetic waveguides. The quantum computer further includes a hermetic connector assembly operatively connecting the interior electromagnetic waveguides to the exterior electromagnetic waveguides while maintaining the refrigerated vacuum environment. The hermetic connector assembly includes an exterior multi-waveguide connector, an interior multi-waveguide connector, and a dielectric plate arranged between and hermetically sealed with the exterior multi-waveguide connector and the interior multi-waveguide connector. The dielectric plate permits electromagnetic energy when carried by the interior and exterior pluralities of electromagnetic waveguides to pass therethrough.
ELECTRICAL STRUCTURE WITH NON-LINEAR ELECTRICAL INTERCONNECT
In an embodiment, a 3D-printed electrical structure such as an electromagnetic bandgap is provided. The structure includes a dielectric material with an embedded electrical interconnect that functions like a via and electrically connects a first surface of the dielectric material with a second surface of the dielectric material such as a ground plane. Unlike conventional vias, the embedded interconnect is not limited to straight lines and can take a variety of shapes and paths in the dielectric material allowing for the electrical interconnect to have a longer length than the thickness of the dielectric material. Increasing the length of the electrical interconnect increases the inductance of the electrical interconnect which in turn increases the bandwidth and reduces the frequency of the electrical structure without an increase in the height of the dielectric material.
High frequency filter
A coaxial line is provided which includes: a first columnar conductor disposed inside a multilayer substrate such that one end thereof is coupled to a first stripline and that the other end thereof is coupled to a second stripline; and one or more second columnar conductors penetrating the multilayer substrate such that one end thereof is coupled to a ground layer and that the other end thereof is coupled to a ground layer, the first columnar conductor acting as an inner conductor, and the second columnar conductors acting as outer conductors. Each of the first and second striplines is coupled to an open stub acting as resonators and a matching conductor acting as capacitance matching elements.
CIRCUIT SUBSTRATE, ANTENNA ELEMENT, BUILT-IN MILLIMETER WAVE ABSORBER FOR CIRCUIT SUBSTRATE, AND METHOD FOR REDUCING NOISE IN CIRCUIT SUBSTRATE
A circuit substrate includes a multi-layer substrate in which a plurality of dielectric layers are stacked, and a millimeter wave absorber provided inside the multi-layer substrate and having an electromagnetic wave absorption peak within a region of 30 to 300 GHz. An antenna element includes the circuit substrate described above, a power feeder provided inside the multi-layer substrate of the circuit substrate, and an antenna provided on a surface of the circuit substrate and connected to the power feeder. A method for reducing noise in a circuit substrate including a multi-layer substrate includes, by a millimeter wave absorber provided inside the multi-layer substrate and having an electromagnetic wave absorption peak within a region of 30 to 300 GHz, absorbing unnecessary electromagnetic waves diffused in the multi-layer substrate to reduce noise in the circuit substrate.
SINGLE LAYER RADIO FREQUENCY INTEGRATED CIRCUIT PACKAGE AND RELATED LOW LOSS GROUNDED COPLANAR TRANSMISSION LINE
A novel and useful a single layer RFIC/MMIC structure including a package and related redistribution layer (RDL) based low loss grounded coplanar transmission line. The structure includes a package molded around an RF circuit die with a single redistribution layer (RDL) fabricated on the surface thereof mounted on an RF printed circuit board (PCB) via a plurality of solder balls. Coplanar transmission lines are fabricated on the RDL to conduct RF output signals from the die to PCB signal solder balls. The signal trace transition to the solder balls are funnel shaped to minimize insertion loss and maximize RF isolation between channels. A conductive ground shield is fabricated on the single RDL and operative to shield the plurality of coplanar transmission lines. The ground shield is electrically connected to a ground plane on the PCB via a plurality of ground solder balls arranged to surround the plurality of coplanar RF transmission lines and signal solder balls, and are operative to couple the ground shield to the ground plane on the PCB and provide an electrical return path for the plurality of coplanar transmission lines. Ground vias on the printed circuit board can be either located under the ground solder balls or between them.
CONNECTION PLATE, CIRCUIT BOARD ASSEMBLY, AND ELECTRONIC DEVICE
An circuit board assembly includes a first circuit board, a second circuit board stacked with the first circuit board, and a connection plate connected between the first circuit board and the second circuit board. The connection plate includes a signal transmission part and at least one ground part at a spacing to the signal transmission part. The ground part can be used as a reference ground for a signal transmitted by the signal transmission part, so that the characteristic impedance of the signal transmission part is controllable, and the signal transmitted by the signal transmission part has strong continuity, thereby maintaining good matching performance and reducing an insertion loss caused by characteristic impedance mismatch.
SUBSTRATE CONNECTION MEMBER COMPRISING SUBSTRATE HAVING OPENING PART, WHICH ENCOMPASSES REGION IN WHICH THROUGH WIRE IS FORMED, AND CONDUCTIVE MEMBER FORMED ON SIDE SURFACE OF OPENING PART, AND ELECTRONIC DEVICE COMPRISING SAME
A substrate connection member according to various embodiments of the present invention can comprise a printed circuit board which has a plurality of layers that are stacked and which comprises a front surface, a rear surface, and a side surface encompassing the front surface and the rear surface. The printed circuit board can comprise: an opening part which encompasses a partial region of the printed circuit board and which is penetratingly formed from the front surface to the rear surface; at least one bridge connected between the partial region and the printed circuit board by crossing at least a portion of the opening part; and at least one through-hole wire formed in the partial region from the front surface to the rear surface, wherein the inner surface of the opening part and the side surface of the bridge can be formed from a conductive member. Other various embodiments, in addition to the embodiments disclosed in the present invention, are possible.