Patent classifications
H05K3/3436
COMPOSITE SOLDER BALLS METALLISED ON THE SURFACE AND CALIBRATED FOR THE ASSEMBLY OF ELECTRONIC BOARDS
The present invention relates to a method for manufacturing composite solder balls that are metallized on the surface and calibrated, these balls comprising a core consisting of a spherical support particle of diameter Do made of expanded polystyrene and having an intergranular porosity of at least 50%, and a shell covering said support particle and formed by a plurality of metallic surface layers. The present invention also relates to balls that can be obtained by the method according to the invention, as well as to the use thereof for the assembly of electronic boards.
BOARD UNIT AND SEMICONDUCTOR DEVICE
A board unit according to an embodiment includes a circuit board, a semiconductor device, and a wire. The semiconductor device has a bottom surface facing the circuit board. The semiconductor device includes a plurality of bonding members between the circuit board and the bottom surface. The wire is disposed between the circuit board and the bottom surface. The bonding members have a first row and a second row. Two or more bonding members align in the first row in a first direction. Two or more bonding members align in the second row in the first direction. The second row is apart from the first row in a second direction intersecting with the first direction. The wire includes a first portion disposed between the first row and the second row, and the wire has a strength higher than that of one of the bonding members.
DENSELY PACKED ELECTRONIC SYSTEMS
A high-resolution substrate having an area of at least 100 square centimeters and selected traces having a line/space dimension of 2 micrometers or less is employed to integrate multiple independently operable clusters of flip chip mounted components, thereby creating a circuit assembly. Each independently operable cluster of components preferably includes a power distribution chip, a test/monitor chip, and at least one redundant chip for each type of logic device and for each type of memory device. The components in at least one of the independently operable clusters of components may include the components provided in a commercially available chiplet assembly. An electronic system may comprise multiple substrates comprising independently operable clusters of components, plus a motherboard, a system controller, and a system input/output connector.
SEMICONDUCTOR DEVICE PACKAGE HAVING THERMAL DISSIPATION FEATURE AND METHOD THEREFOR
A semiconductor device package having a thermal dissipation feature is provided. The semiconductor device package includes a package substrate. A semiconductor die is mounted on a first surface of the package substrate. A thermal conductive structure including a die pad portion is affixed to the semiconductor die. A limb portion of the thermal conductive structure extends laterally away from the die pad portion and overlaps a portion of the package substrate. A thermal conduction path is formed between the semiconductor die and a distal end of the limb portion.
Fan-out light-emitting diode (LED) device substrate with embedded backplane, lighting system and method of manufacture
Panels of LED arrays and LED lighting systems are described. A panel includes a substrate having a top and a bottom surface. Multiple backplanes are embedded in the substrate, each having a top and a bottom surface. Multiple first electrically conductive structures extend at least from the top surface of each of the backplanes to the top surface of the substrate. Each of multiple LED arrays is electrically coupled to at least some of the first conductive structures. Multiple second conductive structures extend from each of the backplanes to at least the bottom surface of the substrate. At least some of the second electrically conductive structures are coupled to at least some of the first electrically conductive structures via the backplane. A thermal conductive structure is in contact with the bottom surface of each of the backplanes and extends to at least the bottom surface of the substrate.
ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME
The present disclosure provides an electronic device and method of manufacturing the same. The electronic device includes a first region, a second region, an electronic component, and a first sensing element. The second region is adjacent to the first region. The first region has a first pliability. The second region has a second pliability. The second pliability is greater than the first pliability. The electronic component is disposed at the first region. The first sensing element is disposed at the second region and electrically connected to the electronic component.
CHIP MODULE AND ELECTRONIC DEVICE
A chip module includes a circuit board (2), a slot (21) disposed on a surface of one side of the circuit board (2), a lidless packaged chip (5), a heat radiator (4), and a substrate fixing assembly (6). The lidless packaged chip (5) includes a substrate (51) and a die (52) packaged on the substrate (51). The slot (21) is electrically connected to the circuit board (2), the lidless packaged chip (5) has a connecting part on one side of the substrate (51) facing away from the die (52), and the connecting part is inserted into the slot (21). The heat radiator (4) is press-fitted on one side of the die (52) facing away from the circuit board (2). The substrate fixing assembly (6) is press-fitted at a periphery of one side of the substrate (51) facing away from the circuit board (2) and avoids the die (52).
Method for forming bump electrode substrate
A method includes applying a first flux onto an electrode provided on a substrate and placing a solder material on the electrode, heating the substrate to form a solder bump on the electrode, deforming the solder bump to provide a flat surface or a depressed portion on the solder bump, applying a second flux to the solder bump; placing a core material on the solder bump, the core material including a core portion and a solder layer that covers a surface of the core portion, and heating the substrate to join the core material to the electrode by the solder bump and the solder layer.
Multilayer ceramic capacitor
An interposer of a multilayer ceramic capacitor includes a first through-hole in which a first pass-through conductive portion is provided on an inside wall thereof. A first surface side of the first through-hole is filled with a first conductive joining material that recessed at a central portion thereof as the first through-hole is seen from a second surface toward a first surface. The interposer includes a second through-hole in which a second pass-through conductive portion is provided on an inside wall thereof. A first surface side of the second through-hole is filled with a second conductive joining material that is recessed at a central portion thereof as the second through-hole is seen from a second surface toward a first surface.
Switched power stage with integrated passive components
A scalable switching regulator architecture may include an integrated inductor. The integrated inductor may include vias or pillars in a multi-layer substrate, with selected vias coupled at one end by a redistribution layer of the multi-layer substrate and, variously, coupled at another end by a metal layer of a silicon integrated circuit chip or by a further redistribution layer of the multi-layer substrate. The vias may be coupled to the silicon integrated circuit chip by micro-balls, with the vias and micro-balls arranged in arrays.