A method for forming spacers of a gate of a transistor is provided, including: providing an active layer surmounted by a gate; forming a dielectric layer covering the gate and the active layer, the dielectric layer having lateral portions, and basal portions covering the active layer; anisotropically modifying the basal portions by implantation of hydrogen-based ions in a direction parallel to the lateral sides of the gate, forming modified basal portions; annealing desorbing the hydrogen from the active layer and transforming the modified basal portions into second modified basal portions; and removing the modified basal portions by selective etching of the modified dielectric material with respect to the non-modified dielectric material and with respect to the semiconductive material, so as to form the spacers on the lateral sides of the gate.

Provided are certain silyl amine compounds useful as precursors in the vapor deposition of silicon-containing materials onto the surfaces of microelectronic devices. Such precursors can be utilized with optional co-reactants to deposit silicon-containing films such as silicon nitride, silicon oxide, silicon oxynitride, silicon oxycarbonitride (SiOCN), silicon carbonitride (SiCN), and silicon carbide.

Methods of forming structures including a photoresist underlayer and an adhesion layer and structures including the photoresist underlayer and adhesion layer are disclosed. Exemplary methods include forming the photoresist underlayer and forming an adhesion layer using a cyclical deposition process. The adhesion layer can be formed within the same reaction chamber used to form the photoresist underlayer.

There is provided a technique capable of improving a step coverage performance of a film formed on a substrate. According to one aspect thereof, there is provided a substrate processing method including: (a1) supplying a first process gas such that a transfer velocity of the first process gas toward an edge region of a substrate is faster than the transfer velocity of the first process gas toward a central region of the substrate; (a2) supplying a second process gas such that a transfer velocity of the second process gas toward the central region of the substrate is faster than the transfer velocity of the second process gas toward the edge region of the substrate; and (b) supplying a reactive gas toward the substrate.

Provided is a composition containing a silylamine compound and a method for manufacturing a silicon-containing thin film using the same, and more particularly, a composition for depositing a silicon-containing thin film, containing a silylamine compound capable of forming a silicon-containing thin film having a significantly excellent water vapor transmission rate to thereby be usefully used as a precursor of the silicon-containing thin film and an encapsulant of a display, and a method for manufacturing a silicon-containing thin film using the same.

Methods and devices for forming a conductive line disposed over a substrate. A first dielectric layer is disposed over the substrate and coplanar with the conductive line. A second dielectric layer disposed over the conductive line and a third dielectric layer disposed over the first dielectric layer. A via extends through the second dielectric layer and is coupled to the conductive line. The second dielectric layer and the third dielectric layer are coplanar and the second and third dielectric layers have a different composition. In some embodiments, the second dielectric layer is selectively deposited on the conductive line.

A semiconductor device includes: at least one gate structure comprising a gate electrode over a substrate, the gate electrode comprising a conductive material; and a first dielectric layer disposed along one or more side wall of the at least one gate structure, the first dielectric layer comprising fluorine doped silicon oxycarbonitride or fluorine doped silicon oxycarbide.

A semiconductor device structure is provided. The semiconductor device includes a first nanowire structure over a second nanowire structure, a gate stack wrapping around the first nanowire structure and the second nanowire structure, a source/drain feature adjoining the first nanowire structure and the second nanowire structure, a gate spacer layer over the first nanowire structure and between the gate stack and the source/drain feature, and an inner spacer layer between the first nanowire structure and the second nanowire structure and between the gate stack and the source/drain feature. The gate spacer layer has a first carbon concentration, the inner spacer has a second carbon concentration, and the second carbon concentration is lower than the first carbon concentration.

Disclosed herein are methods for manufacturing IC components using bottom-up fill of openings with a dielectric material. In one aspect, an exemplary method includes, first, depositing a solid dielectric liner on the inner surfaces of the openings using a non-flowable process, and subsequently filling the remaining empty volume of the openings with a fill dielectric using a flowable process. Such a combination method may maximize the individual strengths of the non-flowable and flowable processes due to the synergetic effect achieved by their combined use, while reducing their respective drawbacks. Assemblies and devices manufactured using such methods are disclosed as well.

The present invention relates to a substrate processing method for selectively etching a silicon nitride layer on a substrate on which silicon oxide layers and silicon nitride layers are alternately stacked, the method including plasma etching the silicon nitride layers using plasma of a plurality of gases, wherein the plurality of gases include a first gas containing fluorine excluding nitrogen trifluoride (NF.sub.3) and a second gas containing hydrogen, and the etch profile in the thickness direction of the silicon nitride layers is controlled by adjusting the atomic ratio of fluorine to hydrogen included in the plurality of gases.