The present application discloses a thin-film deposition method and a semiconductor device. The thin-film deposition method in the present application includes: providing a substrate; performing thin-film deposition on the substrate by using a thin-film deposition technology to form a first deposited layer; introducing a purge gas to perform impurity purge treatment on the first deposited layer to form a purified deposited layer; and forming a thin-film layer by the purified deposited layer. In the thin-film deposition method of the present application, the thin-film deposition technology is adopted to form the deposited layer, and impurity purge treatment is performed on the deposited layer.

A method of fabricating a memory device includes forming an oxide layer on a semiconductor substrate, and forming an isolation structure in the semiconductor substrate and the oxide layer to define an active area. The method also includes forming a word line and a bit line in the semiconductor substrate, wherein the bit line is above the word line. The method further includes removing the oxide layer to form a recess between the isolation structure and the bit line, and forming a storage node contact in the recess. In addition, from a top view, the storage node contact of the memory device overlaps a corresponding portion of the active area.

A semiconductor device includes a nitride semiconductor layer, an insulating layer provided on a surface of the nitride semiconductor layer, and a metal electrode in contact with the surface through an opening penetrating the insulating layer. The insulating layer includes a first SiN film having a concentration of chlorine (Cl) of 1×10.sup.20 [atoms/cm.sup.3] or more and a thickness of 30 nm or less, and a second SiN film having a concentration of chlorine (Cl) of 1×10.sup.19 [atoms/cm.sup.3] or less.

A method for forming an oligomer-containing layer on a substrate and in a concave portion formed on the substrate by performing a cycle a predetermined number of times under a first temperature, the cycle including supplying a precursor gas to the substrate, and supplying first and second nitrogen- and hydrogen-containing gases to the substrate, so an oligomer including an element in at least one selected from the group of the precursor gas, and the first and second nitrogen-hydrogen-containing gasses, flowed in the concave portion, and (b) forming a film to fill the inside of the concave portion by post-treating the substrate, which has the oligomer-containing layer formed on the surface of the substrate and in the concave portion, under a second temperature not less than the first temperature, so that the oligomer-containing layer formed in the concave portion is modified to form the film.

An electrical device includes a substrate, a dielectric layer supported by the substrate, and an electrically conductive vertical interconnect extending through the dielectric layer. The dielectric layer may be formed at low-temperature below the thermal degradation temperature of thermally-sensitive material in the device. The dielectric layer may be a low-stress layer that imparts no stress or less stress than a failure stress of fragile material in the device. The dielectric layer may be formed during a processing step to planarize the electrical device at that step. The vertical interconnect may be diffusion bondable with another opposing interconnect at a low-temperature below the thermal degradation temperature of thermally-sensitive material in the device. The vertical interconnect may have a coefficient of thermal expansion (CTE) that is greater than a CTE of the dielectric layer to facilitate 3D-integration.

Memory devices and methods of forming memory devices are described. The memory devices comprise a silicon nitride hard mask layer on a ruthenium layer. Forming the silicon nitride hard mask layer on the ruthenium comprises pre-treating the ruthenium layer with a plasma to form an interface layer on the ruthenium layer; and forming a silicon nitride layer on the interface layer by plasma-enhanced chemical vapor deposition (PECVD). Pre-treating the ruthenium layer, in some embodiments, results in the interface layer having a reduced roughness and the memory device having a reduced resistivity compared to a memory device that does not include the interface layer.

Provided is a substrate processing method capable of filling a film in a gap structure without forming voids or seams in a gap, the substrate processing method including: a first step of forming a thin film on a structure including a gap by performing a first cycle including supplying a first reaction gas and supplying a second reaction gas to the structure a plurality of times; a second step of etching a portion of the thin film by supplying a fluorine-containing gas onto the thin film; a third step of supplying a hydrogen-containing gas onto the thin film; a fourth step of supplying an inhibiting gas to an upper portion of the gap; and a fifth step of forming a thin film by performing a second cycle including supplying the first reaction gas and supplying a second reaction gas onto the thin film a plurality of times.

There is provided a technique that includes executing a process recipe for processing a substrate; and executing a correction recipe for checking a characteristic value of a supply valve installed at a process gas supply line, wherein the act of executing the correction recipe comprises: supplying an inert gas into the process gas supply line for a certain period of time in a state where an adjusting valve that is installed at an exhaust portion of a process furnace and adjusts an internal pressure of the process furnace is fully opened; detecting a pressure value in a supply pipe provided with the supply valve while supplying the inert gas into the process gas supply line in the state where the adjusting valve is fully opened; and calculating the characteristic value of the supply valve based on the detected pressure value.

Some embodiments include methods of forming integrated assemblies. A conductive structure is formed to include a semiconductor-containing material over a metal-containing material. An opening is formed to extend into the conductive structure. A conductive material is formed along a bottom of the opening. A stack of alternating first and second materials is formed over the conductive structure either before or after forming the conductive material. Insulative material and/or channel material is formed to extend through the stack to contact the conductive material. Some embodiments include integrated assemblies.

A deposition method according to one aspect of the present disclosure includes performing multiple execution cycles serially. Each of the multiple execution cycles includes: supplying a raw material gas into a process chamber; and supplying a reactant gas that reacts with the raw material gas. Among the multiple execution cycles, at least one execution cycle includes adjusting a pressure in the process chamber without supplying the raw material gas, and the adjusting of the pressure is performed prior to the supplying of the raw material gas.