A method for depositing a silicon-containing film, the method comprising: placing a substrate comprising at least one surface feature into a flowable CVD reactor which is at a temperature of from about −20° C. to about 100° C.; increasing pressure in the reactor to at least 10 torr; and introducing into the reactor at least one silicon-containing compound having at least one acetoxy group to at least partially react the at least one silicon-containing compound to form a flowable liquid oligomer wherein the flowable liquid oligomer forms a silicon oxide coating on the substrate and at least partially fills at least a portion of the at least one surface feature. Once cured, the silicon oxide coating has a low k and excellent mechanical properties.

A method for manufacturing a semiconductor device includes forming a source/drain region on a semiconductor fin. The source/drain region is adjacent to a dummy gate. The method further includes forming a first dielectric layer over the source/drain region and the dummy gate. The first dielectric layer has a dielectric constant of 3.5 or less. The first dielectric layer may include boron nitride or silicon dioxide with Si-CH.sub.3 bonds.

Exemplary deposition methods may include forming a plasma of an oxygen-containing precursor within a processing region of a semiconductor processing chamber. The processing region may house a semiconductor substrate on a substrate support. The methods may include, while maintaining the plasma of the oxygen-containing precursor, flowing a silicon-containing precursor through a faceplate into the processing region of the semiconductor processing chamber. The faceplate may have an impedance of at least 5.75 deciohm. The methods may include depositing a silicon-containing material on the semiconductor substrate.

A method of area selective deposition for cap layer formation in advanced semiconductor contacts. The method includes providing a planarized substrate including a first dielectric layer and a first metal layer, oxidizing a surface of the first metal layer to form an oxidized metal layer, and selectively depositing a second dielectric layer on the oxidized metal layer. The selectively depositing the second dielectric layer can include moving the planarized substrate below a gas inlet dispensing a deposition gas during a spatial vapor phase deposition process, where the deposition gas is preferentially exposed to the oxidized metal layer extending above a surface of the first dielectric layer.

A method for manufacturing an integrated circuit includes patterning a plurality of photomask layers over a substrate, partially backfilling the patterned plurality of photomask layers with a first material using atomic layer deposition, completely backfilling the patterned plurality of photomask layers with a second material using atomic layer deposition, removing the plurality of photomask layers to form a masking structure comprising at least one of the first and second materials, and transferring a pattern formed by the masking structure to the substrate and removing the masking structure. The first material includes a silicon dioxide, silicon carbide, or carbon material, and the second material includes a metal oxide or metal nitride material.

A method of manufacturing a semiconductor device includes depositing a first insulation film in a via hole of a semiconductor substrate and above a first surface thereof, the semiconductor substrate having a circuit substrate on a second surface thereof, depositing a second insulation film having a covering property lower than the first insulation film in the via hole and above the first surface, and removing the first and second insulation films deposited at the bottom of the via hole by anisotropic etching.

Methods are provided for selective film deposition. One method includes providing a substrate containing a dielectric material and a metal layer, the metal layer having an oxidized metal layer thereon, coating the substrate with a metal-containing catalyst layer, treating the substrate with an alcohol solution that removes the oxidized metal layer from the metal layer along with the metal-containing catalyst layer on the oxidized metal layer, and exposing the substrate to a process gas containing a silanol gas for a time period that selectively deposits a SiO.sub.2 film on the metal-containing catalyst layer on the dielectric material.

A method and apparatus for material deposition onto a sample to form a protective layer composed of at least two materials that have been formulated and arranged according to the material properties of the sample.

An integrated capacitor on a semiconductor surface on a substrate includes a capacitor dielectric layer including at least one silicon compound material layer on a bottom plate. The capacitor dielectric layer includes a pitted sloped dielectric sidewall. Each of the pits is at least partially filled by one of a plurality of noncontiguous dielectric portions. A conformal dielectric layer may be formed over the noncontiguous dielectric portions. A top metal layer provides a top plate of the capacitor.

Examples of a technique for forming a dielectric material for an integrated circuit are provided herein. In an example, an integrated circuit workpiece is received that includes a recess. A first dielectric precursor is deposited in the recess. The first dielectric precursor includes a non-semiconductor component. A second dielectric precursor is deposited in the recess on the first dielectric precursor, and an annealing process is performed such that a portion of the non-semiconductor component of the first dielectric precursor diffuses into the second dielectric precursor. The non-semiconductor component may include oxygen, and the annealing process may be performed in one of a vacuum or an inert gas environment.