Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.

A method of manufacturing a semiconductor device by processing a substrate by supplying a processing space with a gas dispersed in a buffer space disposed at an upstream side of the processing space is provided. The method includes (a) transferring the substrate into the processing space while exhausting a transfer space of the substrate by a first vacuum pump; (b) closing a first valve disposed at a downstream side of the first vacuum pump; (c) supplying the gas into the processing space via the buffer space; and (d) exhausting the buffer space through an exhaust pipe connected to a downstream side of the first valve.

A method for semiconductor processing includes forming a first dielectric layer comprising an N-type dopant over a first plurality of fins extending above a first region of a substrate, forming a second dielectric layer comprising a P-type dopant over the first plurality of fins and a second plurality of fins extending above a second region of the substrate, the second dielectric layer overlying the first dielectric layer, and forming an isolation layer between adjacent ones of the first plurality of fins, and between adjacent ones of the second plurality of fins. The method further includes performing an implantation process using a first dopant, the implantation process changing an etching rate of the isolation layer, and recessing the isolation layer, the first dielectric layer, and the second dielectric layer, where after the recessing, the first and the second plurality of fins extend above an upper surface of the isolation layer.

Methods and apparatus to form films on sensitive substrates while preventing damage to the sensitive substrate are provided herein. In certain embodiments, methods involve forming a bilayer film on a sensitive substrate that both protects the underlying substrate from damage and possesses desired electrical properties. Also provided are methods and apparatus for evaluating and optimizing the films, including methods to evaluate the amount of substrate damage resulting from a particular deposition process and methods to determine the minimum thickness of a protective layer. The methods and apparatus described herein may be used to deposit films on a variety of sensitive materials such as silicon, cobalt, germanium-antimony-tellerium, silicon-germanium, silicon nitride, silicon carbide, tungsten, titanium, tantalum, chromium, nickel, palladium, ruthenium, or silicon oxide.

A semiconductor device manufacturing method, including: mounting substrates on a mounting table within a processing chamber along a rotation direction of the table; starting to supply a first-element-containing gas to a first region in the chamber along the rotation direction, while rotating the table and exhausting the processing chamber; starting to supply a second-element-containing gas to a second region in the chamber; starting to generate, by a plasma generating unit in the second region, plasma of the second-element-containing gas in the second region to have a first activity; and forming a thin film containing first and second elements on the substrates by rotating the table to cause the substrates to sequentially pass through the first and second regions in turn so that a first-element-containing layer is formed in the first region and is modified in the second region by generating plasma having a second activity higher than the first activity.

In a process chamber in which a substrate is processed, a gas supply unit is in the process chamber and configured to supply a process gas that processes the substrate. A plasma generation unit is in the process chamber and configured to activate the process gas, and a buffer part is configured to form a buffer chamber accommodating at least a part of the plasma generation unit and include a gas supply hole through which the activated process gas is supplied to the substrate. The buffer part includes a groove portion in which a part of the gas supply hole is cut out.

Disclosed are amino(iodo)silane precursors, methods of synthesizing the same, and methods of using the same to deposit silicon-containing films using vapor deposition processes. The disclosed amino(iodo)silane precursors include SiH.sub.2I(N(iPr).sub.2) or SiH.sub.2I(N(iBu).sub.2).

According to an embodiment, a wafer (W) includes a layer (EL) to be etched, an organic film (OL), an antireflection film (AL), and a mask (MK1), and a method (MT) according to an embodiment includes a step of performing an etching process on the antireflection film (AL) by using the mask (MK1) with plasma generated in a processing container (12), in the processing container (12) of a plasma processing apparatus (10) in which the wafer (W) is accommodated, and the step includes steps ST3a to ST4 of conformally forming a protective film (SX) on the surface of the mask (MK1), and steps ST6a to ST7 of etching the antireflection film (AL) by removing the antireflection film (AL) for each atomic layer by using the mask (MK1) on which the protective film (SX) is formed.

Disclosed is a composition for a silica-based insulation layer including hydrogenated polysilazane or hydrogenated polysiloxzane, wherein a concentration of a cyclic compound having a weight average molecular weight of less than 400 is less than or equal to 1,200 ppm. The composition for a silica-based insulation layer may reduce a thickness distribution during formation of a silica-based insulation layer, and thereby film defects after chemical mechanical polishing (CMP) during a semiconductor manufacturing process may be reduced.

The present disclosure provides a method for preparing an interlayer insulating layer and a method for manufacturing a thin film transistor, and a thin film transistor, belongs to the field of display technology, and can solve the problem of poor resistance to breakdown of the interlayer insulating layer in the related art. The method for preparing an interlayer insulating layer includes the following steps: forming a silicon oxide layer with a first reaction gas and forming a silicon nitride layer with a second reaction gas such that hydrogen content in the silicon nitride layer is less than or equal to hydrogen content in the silicon oxide layer.