A semiconductor device includes a substrate having at least a trench formed therein. A conductive material fills a lower portion of the trench. A barrier layer is between the conductive material and the substrate. An insulating layer is in the trench and completely covers the conductive material and the barrier layer, wherein a portion of the insulating layer covering the barrier layer has a bird's peak profile.

In an embodiment, a method includes: forming a fin extending from a substrate, the fin having a first width and a first height after the forming; forming a dummy gate stack over a channel region of the fin; growing an epitaxial source/drain in the fin adjacent the channel region; and after growing the epitaxial source/drain, replacing the dummy gate stack with a metal gate stack, the channel region of the fin having the first width and the first height before the replacing, the channel region of the fin having a second width and a second height after the replacing, the second width being less than the first width, the second height being less than the first height.

Improved resistive random access memory (RRAM) devices are provided that use a 2-D electrode as the SET electrode to take up a variable amount of oxygen from an oxide material, thereby providing a non-volatile resistive memory cell.

A power semiconductor device includes a semiconductor-on-insulator island having a semiconductor region and an insulation structure, the insulation structure being formed by an oxide and separating the semiconductor region from a portion of a semiconductor body of the power semiconductor device. The insulation structure includes a sidewall that laterally confines the semiconductor region; a bottom that vertically confines the semiconductor region; and a local deepening that forms at least a part of a transition between the sidewall and the bottom, wherein the local deepening extends further along the extension direction as compared to the bottom.

Techniques regarding the replenishment of one or more hard mask layers to facilitate one or more etching processes are provided. For example, one or more embodiments described herein can comprise a method, which can comprise replenishing an oxide layer onto a surface of a semiconductor substrate by thermally oxidizing the surface of the semiconductor substrate. The oxide layer can facilitate selective etching of the semiconductor substrate.

A semiconductor device and a method of forming the same are disclosed. First, a substrate having a main surface is provided. At least a trench is formed in the substrate. A barrier layer is formed in the trench and a conductive material is formed on the barrier layer and filling up the trench. The barrier layer and the conductive material are then recessed to be lower than the upper surface of the substrate. After that, an oxidation process is performed to oxidize the barrier layer and the conductive material thereby forming an insulating layer.

A wafer may comprise a substrate layer and a plurality of vertical cavity surface emitting lasers (VCSELs) formed on or within the substrate layer. A respective trench-to-trench distance associated with the plurality of VCSELs may vary across the wafer based on a predicted variation of an oxidation rate of an oxidation layer across the wafer.

A method includes forming a semiconductor fin on a semiconductor substrate, the semiconductor fin comprising germanium, silicon, silicon germanium or any of III-V elements; forming a mask layer on a top portion of the semiconductor fin; and trimming the semiconductor fin, wherein trimming the semiconductor fin comprises: immersing the semiconductor substrate in a first electrolyte bath; and laterally removing a first portion of the semiconductor fin by supplying a first voltage to a counter electrode in the electrolyte bath and a second voltage to the semiconductor substrate, wherein the second voltage is negative.

A body structure and a drift zone are formed in a semiconductor layer, wherein the body structure and the drift zone form a first pn junction. A silicon nitride layer is formed on the semiconductor layer. A silicon oxide layer is formed from at least a vertical section of the silicon nitride layer by oxygen radical oxidation.

A semiconductor manufacturing apparatus according to an embodiment comprises: a lid member; a support member; an oxidation resistant member; and an oxidizing system gas introducing member. The lid member is opposed to a surface of a semiconductor substrate. The support member supports the lid member. The oxidation resistant member is opposed to a back of the semiconductor substrate. The oxidizing system gas introducing member introduces an oxidizing system gas that oxidizes the back of the semiconductor substrate.