Described herein is a technique capable of preventing a constituent contained in an aluminum alloy from being vaporized and scattered when the aluminum alloy is used in a process vessel which is heated to a high temperature. According to one aspect thereof, there is provided a technique including a process chamber; a substrate support configured to support a substrate in the process chamber; and a heater configured to heat the substrate supported by the substrate support, wherein the substrate support is made of an aluminum alloy containing magnesium, and a surface of the substrate support is coated by a coating film of aluminum oxide containing magnesium oxide and being substantially free of magnesium

A heat treatment apparatus includes: an inner tube having a cylindrical shape and configured to accommodate a substrate; an outer tube configured to cover an outside of the inner tube; a heater provided around the outer tube; a gas supply pipe that extends along a longitudinal direction in the inner tube; an opening formed in a side wall of the inner tube facing the gas supply pipe; a temperature sensor provided at a position shifted by a predetermined angle from the opening in a circumferential direction of the inner tube; and a controller that controls the heater based on a detected value of the temperature sensor.

A method includes etching a dielectric layer of a substrate to form an opening in the dielectric layer, forming a metal layer extending into the opening, performing an anneal process, so that a bottom portion of the metal layer reacts with a semiconductor region underlying the metal layer to form a source/drain region, performing a plasma treatment process on the substrate using a process gas including hydrogen gas and a nitrogen-containing gas to form a silicon-and-nitrogen-containing layer, and depositing a metallic material on the silicon-and-nitrogen-containing layer.

A method of selectively and conformally doping semiconductor materials is disclosed. Some embodiments utilize a conformal dopant film deposited selectively on semiconductor materials by thermal decomposition. Some embodiments relate to doping non-line of sight surfaces. Some embodiments relate to methods for forming a highly doped crystalline semiconductor layer.

Implementations of methods of loading an evaporator may include, using a robotic arm, removing a substrate from a cassette and centering the substrate on a substrate aligner. The method may include aligning the substrate using the substrate aligner. The substrate may also include removing the substrate from the substrate aligner using the robotic arm and loading the substrate into a first available pocket of a planet of an evaporator using the robotic arm. The method may also include rotating the planet to a second available pocket after detecting a presence of the substrate in the first available pocket.

A method of manufacturing a high electron mobility transistor, comprising steps of: forming a first SiN film on a surface of a semiconductor stack consisting of a nitride semiconductor and including a barrier layer by a low pressure chemical vapor deposition method at a first furnace temperature of 700° C. or more and 900° C. or less; forming an interface oxide layer on the first SiN film by moisture and oxygen in the furnace at a second furnace temperature of 700° C. or more and 900° C. or less and a furnace pressure to 1 Pa or lower; and forming a second SiN film on the interface oxide layer by the low pressure chemical vapor deposition method at a third furnace temperature of 700° C. or more and 900° C. or less.

An integrated circuit includes a semiconductor substrate that has a top surface. A trench is formed within the substrate, and a conductive filler structure fills the trench. An insulator is located between the semiconductor substrate and the conductive filler. The insulator has a top portion with a top surface at the top surface of the substrate, The insulator further has a bottom portion that forms a corner with the top portion and extends from the corner to a bottom of the trench.

A method includes etching a dielectric layer of a substrate to form an opening in the dielectric layer, forming a metal layer extending into the opening, performing an anneal process, so that a bottom portion of the metal layer reacts with a semiconductor region underlying the metal layer to form a source/drain region, performing a plasma treatment process on the substrate using a process gas including hydrogen gas and a nitrogen-containing gas to form a silicon-and-nitrogen-containing layer, and depositing a metallic material on the silicon-and-nitrogen-containing layer.

A method for fabricating conductive deep trenches in conjunction with shallow trench isolations in a semiconductor device. The disclosed method introduces an integrated sequence during which a shallow trench is etched and filled before a deep trench is etched and filled. The disclosed method advantageously reduces cone defects and process complexity associated with the formation of a conductive deep trench within a shallow trench isolation structure. Fabricated under the integrated sequence, the conductive deep trench may extend through a shallow trench dielectric layer and into the substrate, where the top surfaces of both the conductive deep trench and shallow trench dielectric layer are substantially cone free.

A heat treatment apparatus includes: an inner tube having a cylindrical shape and configured to accommodate a substrate; an outer tube configured to cover an outside of the inner tube; a heater provided around the outer tube; a gas supply pipe that extends along a longitudinal direction in the inner tube; an opening formed in a side wall of the inner tube facing the gas supply pipe; a temperature sensor provided at a position shifted by a predetermined angle from the opening in a circumferential direction of the inner tube; and a controller that controls the heater based on a detected value of the temperature sensor.