Provided are a deposition process monitoring system capable of detecting an internal state of a chamber in a deposition process, and a method of controlling the deposition process and a method of fabricating a semiconductor device using the system. The deposition process monitoring system includes a facility cover configured to define a space for a deposition process, a chamber located in the facility cover, covered with a translucent cover dome, and having a support on which a deposition target is placed, a plurality of lamps disposed in the facility cover, the lamps respectively disposed above and below the chamber, the lamps configured to supply radiant heat energy into the chamber during the deposition process, and a laser sensor disposed outside the chamber, the laser sensor configured to irradiate the cover dome with a laser beam and detect an intensity of the laser beam transmitted through the cover dome, wherein a state of by-products with which the cover dome is coated is determined based on the detected intensity of the laser beam.

In some embodiments, a method for cleaning a processing chamber is provided. The method may be performed by introducing a processing gas into a processing chamber that has a by-product disposed along sidewalls of the processing chamber. A plasma is generated from the processing gas using a radio frequency signal. A lower electrode is connected to a first electric potential. Concurrently, a bias voltage having a second electric potential is applied to a sidewall electrode to induce ion bombardment of the by-product, in which the second electric potential has a larger magnitude than the first electric potential. The processing gas is evacuated from the processing chamber.

A method for forming a semiconductor structure comprising a silicon-on-insulator layer structure with crystalline silicon oxide SiO.sub.x as the insulator material comprises: providing a crystalline silicon substrate having a substantially clean deposition surface in a vacuum chamber; heating the silicon substrate to an oxidation temperature To in the range of 550 to 1200 ° C.; supplying, while keeping the silicon substrate in the oxidation temperature, with an oxidation pressure P.sub.o in the range of 1.Math.10.sup.−8 to 1.Math.10.sup.−4 mbar in the vacuum chamber, molecular oxygen O.sub.2 into the vacuum chamber with an oxygen dose D.sub.o in the range of 0.1 to 1000 Langmuir; whereby a crystalline silicon oxide layer with a thickness of at least two molecular layers is formed within the silicon substrate, between a crystalline silicon base layer and a crystalline silicon top layer. Related semiconductor structures are described.

Described herein is a technique capable of suppressing generation of particles by removing by-products in a groove of a high aspect ratio. According to one aspect of the technique, there is provided a substrate processing apparatus including: a process chamber in which a substrate is processed; and a substrate support provided in the process chamber and including a plurality of supports where the substrate is placed, wherein the process chamber includes a process region where a process gas is supplied to the substrate and a purge region where the process gas above the substrate is purged, and the purge region includes a first pressure purge region to be purged at a first pressure and a second pressure purge region to be purged at a second pressure higher than the first pressure.

Semiconductor device including first semiconductor layer of a first conductivity type, second semiconductor layer of a second conductivity type at a surface of the first semiconductor layer, third semiconductor layer of the first conductivity type selectively provided at a surface of the second layer, and gate electrode embedded in a trench via a gate insulating film. The trench penetrates the second and third layers, and reaches the first layer. A thermal oxide film on the third layer has a thickness less than that of the gate insulating film. Also are an interlayer insulating film on the thermal oxide film, barrier metal on an inner surface of a contact hole selectively opened in the thermal oxide film and the interlayer insulating film, metal plug embedded in the contact hole on the barrier metal, and electrode electrically connected to the second and third layers via the barrier metal and the metal plug.

A semiconductor device includes a first semiconductor fin, a first epitaxial layer, a first alloy layer and a contact plug. The first semiconductor fin is on a substrate. The first epitaxial layer is on the first semiconductor fin. The first alloy layer is on the first epitaxial layer. The first alloy layer is made of one or more Group IV elements and one or more metal elements, and the first alloy layer comprises a first sidewall and a second sidewall extending downwardly from a bottom of the first sidewall along a direction non-parallel to the first sidewall. The contact plug is in contact with the first and second sidewalls of the first alloy layer.

A silicon carbide single crystal manufacturing apparatus includes a crucible constituted by a crucible body and a crucible lid and a base having a crucible lid side surface supported by the lower surface of the crucible lid, and a seed crystal mounting surface on which the seed crystal is mounted and which is a surface on the opposite side of the crucible lid side surface, wherein the base is made of graphite material, the area of the seed crystal mounting surface is larger than the area of the crucible lid side surface, and the base has at least of a portion in which the cross-sectional area orthogonal to the vertical direction connecting the crucible lid side surface and the seed crystal mounting surface is gradually reduced, and a portion that is getting smaller gradually, from the surface of the seed crystal mounting surface toward the crucible lid side surface.

The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate; a plurality of bottom electrodes, spaced apart from each other on the substrate; and a protective layer, located in upper portions of the bottom electrodes and separating the bottom electrodes. A material of the protective layer includes hard hydrogenated amorphous carbon.

A method of forming a semiconductor device includes: forming a gate structure over a fin that protrudes above a substrate; forming source/drain regions over the fin on opposing sides of the gate structure; forming a recess between gate spacers of the gate structure by recessing the gate structure below upper surfaces of the gate spacers; depositing a first layer of a dielectric material in the recess along sidewalls and a bottom of the recess; after depositing the first layer, performing a first etching process to remove portions of the first layer of the dielectric material; and after the first etching process, depositing a second layer of the dielectric material in the recess over the first layer of the dielectric material.

There is provided a technique that includes: a first nozzle arranged to correspond to a first region where a plurality of product substrates are arranged in a substrate arrangement region where a plurality of substrates are arranged in a reaction tube, the first nozzle supplying a hydrogen-containing gas into the reaction tube; a second nozzle arranged to correspond to the first region and supplying an oxygen-containing gas into the reaction tube; a third nozzle arranged closer to the bottom opening than the first region to correspond to a second region where a dummy substrate or a heat insulator or both is arranged, the third nozzle supplying a dilution gas into the reaction tube; and a controller configured to be capable of controlling the hydrogen-containing gas and the dilution gas so that a concentration of the hydrogen-containing gas in the second region is lower than that in the first region.