A method includes coating, via chemical vapor deposition, electronics disposed on a printed circuit board (PCB) with an electrical insulation coating of between one micron to 25 microns. The method further include depositing, on the electrical insulation coating, a metallic nano-layer comprising a porous metallic nano-structure. The method further includes, after the coating and the depositing, immersing the PCB in a water-based fluid to cool the electronics while the electronics are powered on.

A semiconductor component includes a substrate having an opening. The semiconductor component further includes a first dielectric liner in the opening, wherein the first dielectric liner having a thickness T.sub.1 at a first end of the opening, and a thickness T.sub.2 at a second end of the opening, and R.sub.1 is a ratio of T.sub.1 to T.sub.2. The semiconductor component further includes a second dielectric liner over the first dielectric liner, wherein the second dielectric liner having a thickness T.sub.3 at the first end of the opening, a thickness T.sub.4 at the second end of the opening, R.sub.2 is a ratio of T.sub.3 to T.sub.4, and R.sub.1 is greater than R.sub.2.

A method of fabricating a memory device includes forming an oxide layer on a semiconductor substrate, and forming an isolation structure in the semiconductor substrate and the oxide layer to define an active area. The method also includes forming a word line and a bit line in the semiconductor substrate, wherein the bit line is above the word line. The method further includes removing the oxide layer to form a recess between the isolation structure and the bit line, and forming a storage node contact in the recess. In addition, from a top view, the storage node contact of the memory device overlaps a corresponding portion of the active area.

An atomizing apparatus for film formation, including: a raw-material container configured to accommodate a raw-material solution; a cylindrical member configured to spatially connect inside of the container to an outer unit, and disposed so a lower end of the cylindrical member does not touch a liquid surface of the solution in the container; an ultrasound generator having at least one ultrasound generation source; and a liquid tank where the ultrasound propagates to the raw-material solution through a middle solution. A center line of an ultrasound-emitting surface of the ultrasound generation source is designated u, the source is provided so an intersection P between line u and a plane containing a side wall surface of the cylindrical member and an extension thereof is located below a lower end point B of the cylindrical member. This provides an atomizing apparatus for film formation, enabling high-quality thin film formation with suppressed particle adhesion.

An atomizing apparatus for film formation enabling high-quality thin film formation with suppressed particle adhesion, including: a raw-material container accommodating a raw-material solution; a cylindrical member connecting inside the raw-material container to an outer unit, and disposed so a lower end of the cylindrical member does not touch a liquid surface of the raw-material solution in the container; an ultrasound generator having at least one source emitting ultrasound; and a liquid tank where the ultrasound propagates the raw-material solution through a middle solution. The generation source is outside the liquid tank and has a center between a plane extending from an inner side wall of the raw-material container and a plane extending from an outer side wall of the cylindrical member. A center line of an ultrasound-emitting surface of the ultrasound generation source is designated as u, wherein the center line u does not intersect the cylindrical member side wall.

A source electrode (5), a drain electrode (6) and a T-shaped gate electrode (9) are formed on a GaN-based semiconductor layer (3,4) to form a transistor. An insulating film (10,11) covering the T-shaped gate electrode (9) is formed. A property of the transistor is evaluated to obtain an evaluation result. A film type, a film thickness or a dielectric constant of the insulating film (10,11) is adjusted in accordance with the evaluation result to make a property of the transistor close to a target property.

A substrate processing method is provided. In the method, a substrate is provided. A monomer that is chemically bonded to the substrate is supplied onto the substrate. An initiator for polymerizing the monomer is supplied to the substrate having the supplied monomer thereon, thereby forming a polymer film.

A method of manufacturing a memory structure including the following steps is provided. A spacer layer is formed on sidewalls of gate stack structures. A protective material layer covering the spacer layer and the gate stack structures is formed. A mask material layer is formed on the protective material layer. There is a void located in the mask material layer between two adjacent gate stack structures. A first distance is between a top of the protective material layer and a top of the mask material layer. A second distance is between a top of the void and a top of the mask material layer above the void. A third distance is between a bottom of the void and a bottom of the mask material layer below the void. The first distance is greater than a sum of the second and third distances.

A method includes removing a first dummy gate structure to form a recess around a first nanostructure and a second nanostructure; depositing a sacrificial layer in the recess with a flowable chemical vapor deposition (CVD); and patterning the sacrificial layer to leave a portion of the sacrificial layer between the first nanostructure and the second nanostructure. The method further include depositing a first work function metal in first recess; removing the first work function metal and the portion of the sacrificial layer from the recess; depositing a second work function metal in the recess, wherein the second work function metal is of an opposite type than the first work function metal; and depositing a fill metal over the second work function metal in the recess.

A structure and formation method of a semiconductor device is provided. The semiconductor device structure includes an epitaxial structure over a semiconductor substrate. The semiconductor device structure also includes a dielectric fin over the semiconductor substrate. The dielectric fin extends upwards to exceed a bottom surface of the epitaxial structure. The dielectric fin has a dielectric structure and a protective shell, and the protective shell extends along sidewalls and a bottom of the dielectric structure. The protective shell has a first average grain size, and the dielectric structure has a second average grain size. The first average grain size is larger than the second average grain size.