A plasma processing method includes a substrate processing step of performing predetermined processing on a target substrate loaded into a chamber by using plasma of a hydrogen-containing gas and unloading the processed substrate from the chamber; and an in-chamber processing step of processing surfaces of components in the chamber by plasma of an oxygen-containing gas after the substrate processing step is performed at least once. The substrate processing step is performed again at least once after the in-chamber processing step.

The disclosure is directed towards semiconductor devices and methods of manufacturing the semiconductor devices. The methods include forming fins in a device region and forming other fins in a multilayer stack of semiconductor materials in a multi-channel device region. A topmost nanostructure may be exposed in the multi-channel device region by removing a sacrificial layer from the top of the multilayer stack. Once removed, a stack of nanostructures are formed from the multilayer stack. A native oxide layer is formed to a first thickness over the topmost nanostructure and to a second thickness over the remaining nanostructures of the stack, the first thickness being greater than the second thickness. A gate dielectric is formed over the fins in the device region. A gate electrode is formed over the gate dielectric in the device region and surrounding the native oxide layer in the multi-channel device region.

Methods for selective deposition are provided. Material is selectively deposited on a first surface of a substrate relative to a second surface of a different material composition. An inhibitor, such as a polyimide layer, is selectively formed from vapor phase reactants on the first surface relative to the second surface. A layer of interest is selectively deposited from vapor phase reactants on the second surface relative to the first surface. The first surface can be metallic while the second surface is dielectric. Accordingly, material, such as a dielectric transition metal oxides and nitrides, can be selectively deposited on metallic surfaces relative dielectric surfaces using techniques described herein.

A method for forming a semiconductor device structure is provided. The method includes successively forming a first multi-layer etch stop structure and an insulating layer over a first conductive feature. The insulating layer and the first multi-layer etch stop structure are successively etched to form an opening substantially aligned to the first conductive feature. A second conductive feature is formed in the opening. The formation of the first multi-layer etch stop structure and the second multi-layer etch stop structure includes forming a first metal-containing dielectric layer, forming a silicon-containing dielectric layer over the first metal-containing dielectric layer, and forming a second metal-containing dielectric layer over the silicon-containing dielectric layer. The second metal-containing dielectric layer has a material that is different from the material of the first metal-containing dielectric layer.

Methods of depositing a film selectively onto a first substrate surface relative to a second substrate surface are described. The methods include exposing a substrate to a blocking molecule to selectively deposit a blocking layer on the first surface. The blocking layer is exposed to a polymer initiator to form a networked blocking layer. A layer is selectively formed on the second surface. The blocking layer inhibits deposition on the first surface. The networked layer may then optionally be removed.

A semiconductor device having favorable electrical characteristics is provided. The semiconductor device is manufactured by a first step of forming a semiconductor layer containing a metal oxide, a second step of forming a first insulating layer, a third step of forming a first conductive film over the first insulating layer, a fourth step of etching part of the first conductive film to form a first conductive layer, thereby forming a first region over the semiconductor layer that overlaps with the first conductive layer and a second region over the semiconductor layer that does not overlap with the first conductive layer, and a fifth step of performing first treatment on the conductive layer. The first treatment is plasma treatment in an atmosphere including a mixed gas of a first gas containing an oxygen element but not containing a hydrogen element, and a second gas containing a hydrogen element but not containing an oxygen element.

Methods for forming a smooth ultra-thin flowable CVD film by using a surface treatment on a substrate surface before flowable CVD film deposition improves the uniformity and overall film smoothness. The flowable CVD film can be cured by any suitable curing process to form a smooth flowable CVD film.

The disclosure is directed towards semiconductor devices and methods of manufacturing the semiconductor devices. The methods include forming fins in a device region and forming other fins in a multilayer stack of semiconductor materials in a multi-channel device region. A topmost nanostructure may be exposed in the multi-channel device region by removing a sacrificial layer from the top of the multilayer stack. Once removed, a stack of nanostructures are formed from the multilayer stack. A native oxide layer is formed to a first thickness over the topmost nanostructure and to a second thickness over the remaining nanostructures of the stack, the first thickness being greater than the second thickness. A gate dielectric is formed over the fins in the device region. A gate electrode is formed over the gate dielectric in the device region and surrounding the native oxide layer in the multi-channel device region.

An intermediate structure for forming a semiconductor device and method of making is provided. The intermediate device includes (i) a substrate comprising a Ga-based layer, and (ii) optionally, a metal layer on the substrate; wherein at least one of the Ga-based layer and, if present, the metal layer comprises at least a surface region having an isoelectric point of less than 7, usually at most 6.

Plasma processing apparatus and associated methods are provided. In one example, a plasma processing apparatus includes a plasma chamber. The plasma processing apparatus includes a dielectric wall forming at least a portion of the plasma chamber. The plasma processing apparatus includes an inductive coupling element located proximate the dielectric wall. The plasma processing apparatus includes an ultraviolet light source configured to emit an ultraviolet light beam onto a metal surface that faces an interior volume of the plasma chamber. The plasma processing apparatus includes a controller configured to control the ultraviolet light source.