The present disclosure relates to methods and apparatuses for selective deposition on a surface. In particular, a silicon-containing inhibitor can be used to selectively bind to a first region, thus inhibiting deposition of a material on that first region.

A vertical semiconductor device and a method for fabricating the same may include forming an alternating stack of dielectric layers and sacrificial layers over a lower structure, forming an opening by etching the alternating stack, forming a non-conformal blocking layer on the alternating stack in which the opening is formed, adsorbing a deposition inhibitor on a surface of the blocking layer to convert the non-conformal blocking layer into a conformal blocking layer on which the deposition inhibitor is adsorbed, and forming a charge storage layer on the conformal blocking layer.

Certain embodiments of the invention utilize low temperature atomic layer deposition methodology to form material containing silicon and nitrogen (e.g., silicon nitride). The atomic layer deposition uses silicon tetraiodide (SiI.sub.4) or disilicon hexaiodide (Si.sub.2I.sub.6) as one precursor and uses a nitrogen-containing material such as ammonia as another precursor. In circumstances where a selective deposition of silicon nitride is desired to be deposited over silicon dioxide, the substrate surface is first treated with ammonia plasma.

A vertical semiconductor device and a method for fabricating the same may include forming an alternating stack of dielectric layers and sacrificial layers over a lower structure, forming an opening by etching the alternating stack, forming a non-conformal blocking layer on the alternating stack in which the opening is formed, adsorbing a deposition inhibitor on a surface of the blocking layer to convert the non-conformal blocking layer into a conformal blocking layer on which the deposition inhibitor is adsorbed, and forming a charge storage layer on the conformal blocking layer.

Methods and related systems for lithographically defining patterns on a substrate are disclosed. An exemplary method includes forming a structure. The method includes providing a substrate to a reaction chamber. The substrate comprises a semiconductor and a surface layer. The surface layer comprises amorphous carbon. The method further comprises forming a barrier layer on the surface layer and depositing a metal-containing layer on the substrate. The metal- containing layer comprises oxygen and a metal.

A method for forming a semiconductor structure is provided. In one form, a method includes: providing a to-be-processed base structure, where the to-be-processed base structure includes a base layer and pattern structures protruding from the base layer, and a surface of the base structure has adsorption groups; performing plasma treatment on the surface of the base structure by using a reaction gas, where the reaction gas chemically reacts with the adsorption group to cause quantities of precursor adsorption nucleation points on the surface of the base structure to tend to be same; and after the plasma treatment, forming, by using an atomic layer deposition (ALD) process, a target layer conformally covering the surface of the base structure. The plasma treatment is performed on the surface of the base structure, so that the quantities of the precursor adsorption nucleation on top surfaces and sidewalls of the pattern structures and on the surface of the base layer are the same, achieving the modification to the surface of the base structure. Therefore, the thickness uniformity of the target layer is improved, thereby enhancing the performance of a semiconductor.

The present disclosure provides a semiconductor structure and a method for manufacturing the same. The method at least includes: applying a first wet etching to remove a Ti metal seed layer to expose a dielectric layer; performing a first pretreatment on the dielectric layer; forming a first groove in the dielectric layer to expose an interfacial Ti metal seed layer in the dielectric layer; applying a second wet etching to remove the interfacial Ti metal seed layer; and performing a second pretreatment on the dielectric layer to form a second groove with a depth greater than that of the interfacial Ti metal seed layer, which can effectively remove the interfacial Ti metal seed layer, and results in a depth difference between the bottom of the second groove and the interfacial Ti metal seed layer, thereby avoiding short circuits caused by the interfacial Ti metal seed layer, and improving device reliability.

Methods and related systems for filling a gap feature comprised in a substrate are disclosed. The methods comprise a step of providing a substrate comprising one or more gap features into a reaction chamber. The one or more gap features comprise a proximal part comprising a proximal surface and a distal part comprising a distal surface. The methods further comprise a step of subjecting the substrate to a plasma treatment. Thus the proximal surface is inhibited while leaving the distal surface substantially unaffected. Then, the methods comprise a step of selectively depositing a metal- and nitrogen-containing material on the distal surface.

Enhanced oxidation with hydrogen radical pretreatment is described. In an example, a method of oxidizing a substrate includes positioning a substrate in a processing volume of a processing chamber, generating hydrogen radicals using a remote plasma source fluidly coupled to the processing chamber, exposing a surface of the substrate to the generated hydrogen radicals, and, subsequent to exposing the substrate to the generated hydrogen radicals, oxidizing the surface of the substrate to form an oxide layer on the surface of the substrate.

A method for selectively depositing silicon nitride on a first material relative to a second material is disclosed. An exemplary method includes treating the first material, and then selectively depositing a layer comprising silicon nitride on the second material relative to the first material. Exemplary methods can further include treating the deposited silicon nitride.