Patent classifications
H01L21/02323
Semiconductor Device and Method
In an embodiment, a device includes: a gate structure over a substrate; a gate spacer adjacent the gate structure; a source/drain region adjacent the gate spacer; a first inter-layer dielectric (ILD) on the source/drain region, the first ILD having a first concentration of an impurity; and a second ILD on the first ILD, the second ILD having a second concentration of the impurity, the second concentration being less than the first concentration, top surfaces of the second ILD, the gate spacer, and the gate structure being coplanar; and a source/drain contact extending through the second ILD and the first ILD, the source/drain contact coupled to the source/drain region.
TECHNIQUE FOR OXIDIZING PLASMA POST-TREATMENT FOR REDUCING PHOTOLITHOGRAPHY POISONING AND ASSOCIATED STRUCTURES
Embodiments of the present disclosure describe techniques for oxidizing plasma post-treatment for reducing photolithography poisoning. In one embodiment, an apparatus includes a dielectric layer with a plurality of routing features; and an etch stop layer, having a first interface region coupled with the dielectric layer and a second interface region disposed opposite to the first interface region. The first interface region has a peak silicon oxide (SiO.sub.2) concentration level evenly distributed across the first interface region, and the second interface region has substantially zero silicon oxide (SiO.sub.2) concentration level. Other embodiments may be described and/or claimed.
INORGANIC POLYSILAZANE RESIN
An inorganic polysilazane resin of the present invention has a Si/N ratio (i.e. a ratio of contained silicon atoms to contained nitrogen atoms) of 1.30 or more. The inorganic polysilazane resin having such a high Si content can be produced by, for example, a method in which an inorganic polysilazane compound containing both Si—NH and Si—Cl is heated to react NH with Cl, a method in which a silazane oligomer (polymer) that leaves no Si—Cl bond is synthesized and a dihalosilane is added to the synthesized silazane oligomer (polymer) to perform a thermal reaction, and the like. A siliceous film can be formed by, for example, applying a coating composition containing the inorganic polysilazane resin onto a base plate and then dried and the dried product is then oxidized by bringing the dried product into contact with water vapor or hydrogen peroxide vapor and water vapor under heated conditions.
METHOD TO IMPROVE GE CHANNEL INTERFACIAL LAYER QUALITY FOR CMOS FINFET
A method for manufacturing a semiconductor device includes providing a semiconductor structure having a substrate structure, multiple fins having a germanium layer, a dummy gate structure including sequentially a hardmask, a dummy gate, a dummy gate insulating material on the germanium layer, and spacers on opposite sides of the dummy gate structure and on a portion of the germanium layer. The method also includes forming an interlayer dielectric layer on the substrate structure covering the dummy gate structure, planarizing the interlayer dielectric layer to expose a surface of the dummy gate, removing the dummy gate and the dummy gate insulating material to expose a surface of the germanium layer, performing a silane impregnation process on the exposed surface of the germanium layer to introduce silicon to the germanium layer, and performing an oxidation process on the germanium layer to form an oxide layer comprising silicon and germanium.
SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, DISPLAY DEVICE, AND ELECTRONIC DEVICE
The field-effect mobility and reliability of a transistor including an oxide semiconductor film are improved. Provided is a semiconductor device including an oxide semiconductor film. The semiconductor device includes a first insulating film, an oxide semiconductor film over the first insulating film, a second insulating film and a third insulating film over the oxide semiconductor film, and a gate electrode over the second insulating film. The second insulating film comprises a silicon oxynitride film. When excess oxygen is added to the second insulating film by oxygen plasma treatment, oxygen can be efficiently supplied to the oxide semiconductor film.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A highly reliable semiconductor device suitable for miniaturization and high integration is provided. The semiconductor device includes a first insulator; a transistor over the first insulator; a second insulator over the transistor; a first conductor embedded in an opening in the second insulator; a barrier layer over the first conductor; a third insulator over the second insulator and over the barrier layer; and a second conductor over the third insulator. The first insulator, the third insulator, and the barrier layer have a barrier property against oxygen and hydrogen. The second insulator includes an excess-oxygen region. The transistor includes an oxide semiconductor. The barrier layer, the third insulator, and the second conductor function as a capacitor.
SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, MODULE, ELECTRONIC DEVICE, AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a first insulator, a transistor over the first insulator, a second insulator over the transistor, and a third insulator over the second insulator. The transistor includes an oxide semiconductor. The amount of oxygen released from the second insulator when converted into oxygen molecules is larger than or equal to 1×10.sup.14 molecules/cm.sup.2 and smaller than 1×10.sup.16 molecules/cm.sup.2 in thermal desorption spectroscopy at a surface temperature of a film of the second insulator of higher than or equal to 50° C. and lower than or equal to 500° C. The second insulator includes oxygen, nitrogen, and silicon.
Methods of forming semiconductor device structures including metal oxide structures
Methods of forming metal oxide structures and methods of forming metal oxide patterns on a substrate using a block copolymer system formulated for self-assembly. A block copolymer at least within a trench in the substrate and including at least one soluble block and at least one insoluble block may be annealed to form a self-assembled pattern including a plurality of repeating units of the at least one soluble block laterally aligned with the trench and positioned within a matrix of the at least one insoluble block. The self-assembled pattern may be exposed to a metal oxide precursor that impregnates the at least one soluble block. The metal oxide precursor may be oxidized to form a metal oxide. The self-assembled pattern may be removed to form a pattern of metal oxide lines on the substrate surface. Semiconductor device structures are also described.
SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE INCLUDING THE SEMICONDUCTOR DEVICE
To improve field-effect mobility and reliability of a transistor including an oxide semiconductor film. Provided is a semiconductor device including an oxide semiconductor film. The semiconductor device includes a first insulating film, the oxide semiconductor film over the first insulating film, a second insulating film and a third insulating film over the oxide semiconductor film, and a gate electrode over the second insulating film. The oxide semiconductor film includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, and a third oxide semiconductor film over the second oxide semiconductor film. The first to third oxide semiconductor films contain the same element. The second oxide semiconductor film includes a region where the crystallinity is lower than the crystallinity of one or both of the first oxide semiconductor film and the third oxide semiconductor film.
Reducing K Values of Dielectric Films Through Anneal
A method includes performing an atomic layer deposition (ALD) process to form a dielectric layer on a wafer. The ALD process comprises an ALD cycle includes pulsing calypso ((SiCl.sub.3).sub.2CH.sub.2), purging the calypso, pulsing ammonia, and purging the ammonia. The method further includes performing a wet anneal process on the dielectric layer, and performing a dry anneal process on the dielectric layer.