Patent classifications
H01L21/02348
ULTRAVIOLET RADIATION ACTIVATED ATOMIC LAYER DEPOSITION
The present disclosure relates to a method of fabricating a semiconductor structure, the method includes forming an opening and depositing a metal layer in the opening. The depositing includes performing one or more deposition cycles, wherein each deposition cycle includes flowing a first precursor into a deposition chamber and performing an ultraviolet (UV) radiation process on the first precursor. The method further includes performing a first purging process in the deposition chamber to remove at least a portion of the first precursor, flowing a second precursor into the deposition chamber, and purging the deposition chamber to remove at least a portion of the second precursor.
Semiconductor device and method for manufacturing the same
A method for manufacturing a semiconductor device, includes: forming a shallow trench isolation structure surrounding a first semiconductor fin and a second semiconductor fin; forming a dummy gate structure across the first and second semiconductor fins; forming a first flowable dielectric layer over the first and second semiconductor fins; curing the first flowable dielectric layer at a first temperature; removing a first portion of the cured first flowable dielectric layer from above the second semiconductor fin; after removing the first portion of the cured first flowable dielectric layer, forming a second flowable dielectric layer over the second semiconductor fin; curing the second flowable dielectric layer at a second temperature different from the first temperature; and replacing the dummy gate structure with a metal gate structure.
Cryogenic atomic layer etch with noble gases
A method for etching silicon at cryogenic temperatures is provided. The method includes forming an inert layer from condensation of a noble gas at cryogenic temperatures on exposed surfaces such as the sidewalls of a feature to passivate the sidewalls prior to the etching process. The method further includes flowing a fluorine-containing precursor gas into the chamber to form a fluorine-containing layer on the inert layer. The method further includes exposing the fluorine-containing layer and the inert layer to an energy source to form a passivation layer on the exposed portions of the substrate and exposing the substrate to ions to etch the substrate.
DIELECTRIC LAYER, INTERCONNECTION STRUCTURE USING THE SAME, AND MANUFACTURING METHOD THEREOF
A structure includes a first dielectric film and a second dielectric film. The second dielectric film is formed on and in contact with the first dielectric film, in which a first pore is formed between the first dielectric film and the second dielectric film, and a thickness of the first dielectric film is smaller than a diameter of the first pore.
Silacycloalkane compounds and methods for depositing silicon containing films using same
A method and composition for producing a low k dielectric film via plasma enhanced chemical vapor deposition comprise the steps of: providing a substrate within a reaction chamber; introducing into the reaction chamber gaseous reagents including at least one structure-forming precursors comprising a silacycloalkane compound, an oxygen source, and optionally a porogen; applying energy to the gaseous reagents in the reaction chamber to induce reaction of the gaseous reagents to deposit a low k dielectric film having dielectric constant of 3.2 or less. In certain embodiments, the structure-forming precursor further comprises a hardening additive.
Systems and methods for inhibiting detectivity, metal particle contamination, and film growth on wafers
Methods for processing a substrate are provided. The method includes receiving a substrate. The substrate has a front side surface, a backside surface, and a side edge surface. The method also includes coating the front side surface, the backside surface and the side edge surface with a self-assembled monolayer and exposing an area of interest with actinic radiation. The actinic radiation causes a de-protection reaction within the self-assembled monolayer within the central region. The method also includes removing the self-assembled monolayer from the area of interest while the self-assembled monolayer remains on remaining surfaces of the substrate.
Methods for depositing silicon nitride
Embodiments described and discussed herein provide methods for depositing silicon nitride materials by vapor deposition, such as by flowable chemical vapor deposition (FCVD), as well as for utilizing new silicon-nitrogen precursors for such deposition processes. The silicon nitride materials are deposited on substrates for gap fill applications, such as filling trenches formed in the substrate surfaces. In one or more embodiments, the method for depositing a silicon nitride film includes introducing one or more silicon-nitrogen precursors and one or more plasma-activated co-reactants into a processing chamber, producing a plasma within the processing chamber, and reacting the silicon-nitrogen precursor and the plasma-activated co-reactant in the plasma to produce a flowable silicon nitride material on a substrate within the processing chamber. The method also includes treating the flowable silicon nitride material to produce a solid silicon nitride material on the substrate.
LOW TEMPERATURE STEAM FREE OXIDE GAPFILL
Provided are methods of depositing a film in high aspect ratio (AR) structures with small dimensions. The method provides flowable deposition for seamless gap-fill, UV cure for increasing film density, film conversion to silicon oxide at low temperature, and film densification by low temperature inductively coupled plasma (ICP) treatment (<400° C.).
Wafer process, apparatus and method of manufacturing an article
An apparatus is provided. The apparatus has a chuck having a first side configured to retain a superstrate or a template and a second side, an array of image sensors disposed at the second side of the chuck and spaced from the chuck, and an array of light sources disposed between the transparent chuck and the array of image sensors.
PLASMA DOPING OF GAP FILL MATERIALS
In a variety of processes for forming electronic devices that use spin-on dielectric materials, properties of the spin-on dielectric materials can be enhanced by curing these materials using plasma doping. For example, hardness and Young's modulus can be increased for the cured material. Other properties may be enhanced. The plasma doping to cure the spin-on dielectric materials uses a mechanism that is a combination of plasma ion implant and high energy radiation associated with the species ionized. In addition, physical properties of the spin-on dielectric materials can be modified along a length of the spin-on dielectric materials by selection of an implant energy and dopant dose for the particular dopant used, corresponding to a selection variation with respect to length.