H01L21/02348

Methods to deposit flowable (gap-fill) carbon containing films using various plasma sources

Embodiments include a method for forming a carbon containing film. In an embodiment, the method comprises flowing a precursor gas into a processing chamber. For example the precursor gas comprises carbon containing molecules. In an embodiment, the method further comprises flowing a co-reactant gas into the processing chamber. In an embodiment, the method further comprises striking a plasma in the processing chamber. In an embodiment plasma activated co-reactant molecules initiate polymerization of the carbon containing molecules in the precursor gas. Embodiments may also include a method that further comprises depositing a carbon containing film onto a substrate in the processing chamber.

Dielectric gap fill

Generally, examples are provided relating to filling gaps with a dielectric material, such as filling trenches between fins for Shallow Trench Isolations (STIs). In an embodiment, a first dielectric material is conformally deposited in a trench using an atomic layer deposition (ALD) process. After conformally depositing the first dielectric material, the first dielectric material is converted to a second dielectric material. In further examples, the first dielectric material can be conformally deposited in another trench, and a fill dielectric material can be flowed into the other trench and converted.

Semiconductor device and method of forming the same

The present disclosure provides a method for forming a semiconductor device. The method includes providing a substrate having a metal pattern, and forming an etch stop layer over the substrate. The etch stop layer includes a first material. The method also includes forming a diffused area in the etch stop layer by diffusing a second material from the metal pattern to the etch stop layer, and forming an insulative layer over the etch stop layer. The diffused area includes a lower etch rate to a first etchant than the insulative layer. A semiconductor device is also provided.

Cyclic Spin-On Coating Process for Forming Dielectric Material
20230411150 · 2023-12-21 ·

The present disclosure is generally related to semiconductor devices, and more particularly to a dielectric material formed in semiconductor devices. The present disclosure provides methods for forming a dielectric material layer by a cyclic spin-on coating process. In an embodiment, a method of forming a dielectric material on a substrate includes spin-coating a first portion of a dielectric material on a substrate, curing the first portion of the dielectric material on the substrate, spin-coating a second portion of the dielectric material on the substrate, and thermal annealing the dielectric material to form an annealed dielectric material on the substrate.

METHOD FOR FORMING SEMICONDUCTOR STRUCTURE WITH HIGH ASPECT RATIO
20210043523 · 2021-02-11 ·

A semiconductor structure and a method for forming the same are provided. The method includes forming a first protruding structure, a second protruding structure, and a third protruding structure over a substrate. The method also includes performing a depositing process to form a first insulation material layer between the first protruding structure and the second protruding structure. The method further includes performing a first insulation material conversion process onto the first insulation material layer to bend the first protruding structure and the second protruding structure toward opposite directions.

Substrate processing apparatus, substrate processing method and recording medium

A period from a time point when a wafer W is carried into a housing 10 to a time point when the wafer W after being exposed is completely ready to be carried out is set as a single cycle. A time period before a next cycle is begun and after the single cycle is completed is referred to as a standby time period. When an illuminance in dummy light emission is set to be Id; an illuminance in exposure, Is; a time length of the dummy light emission, Td; and a time length of the exposure, Ts, by setting the Id to satisfy an expression of Id=(Tp/Td).Math.Iw(Ts/Td).Math.Is, an average illuminance within the single cycle is maintained constant between substrates.

Enhanced Ignition in Inductively Coupled Plasmas For Workpiece Processing
20210050213 · 2021-02-18 ·

Plasma processing apparatus and associated methods are provided. In one example, a plasma processing apparatus includes a plasma chamber. The plasma processing apparatus includes a dielectric wall forming at least a portion of the plasma chamber. The plasma processing apparatus includes an inductive coupling element located proximate the dielectric wall. The plasma processing apparatus includes an ultraviolet light source configured to emit an ultraviolet light beam onto a metal surface that faces an interior volume of the plasma chamber. The plasma processing apparatus includes a controller configured to control the ultraviolet light source.

Dielectric layer, interconnection structure using the same, and manufacturing method thereof

A method for manufacturing a dielectric layer includes forming a first dielectric film over a substrate. A first porogen is deposited over the first dielectric film. A second dielectric film is formed on and in contact with the first dielectric film and the first porogen. The first porogen is removed.

Gate to source/drain leakage reduction in nanosheet transistors via inner spacer optimization

A method for fabricating a semiconductor device includes forming a first inner spacer layer along a substrate and a nanosheet stack disposed on the substrate, performing an ultraviolet (UV) condensation process to form a hardened inner spacer from the first inner spacer layer, forming a second inner spacer layer along the hardened inner spacer, and removing material to form inner spacers by performing an inner spacer etch.

Semiconductor device and method of forming the same

A method is provided. Plural semiconductor fins are formed on a substrate, and plural trenches each of which is formed between two adjacent semiconductor fins. A silicon liner layer is deposited to be conformal to the semiconductor fins and the trenches. The silicon liner layer is deposited by using a silane compound. Then, an oxide layer is deposited on the silicon liner layer to fill the trenches and cover the semiconductor fins, in which depositing the oxide layer forms water in the oxide layer. Next, a surface of the silicon liner layer is reacted with the water, so as to remove the water from the oxide layer.