Patent classifications
H01L21/02348
GATE CAPPING LAYERS OF SEMICONDUCTOR DEVICES
A semiconductor device is provided, which includes providing an active region, a source region, a drain region, a dielectric layer, a gate structure and a nitrogen-infused dielectric layer. The source region and the drain region are formed in the active region. The dielectric layer is disposed over the source region and the drain region. The gate structure formed in the dielectric layer is positioned between the source region and the drain region. The nitrogen-infused dielectric layer is disposed over the dielectric layer and over the gate structure.
ION IMPLANTATION ASSISTED CURING FOR FLOWABLE POROUS DIELECTRICS
Embodiments of the invention include a method of forming a multi-layer integrated circuit (IC) structure that includes a forming a first IC layer above the substrate, wherein the first IC layer includes a network of interconnect structures, wherein the network of interconnect structures is configured to communicatively couple electronic devices of the IC. A second IC layer is formed over the first IC layer. The second IC layer is implanted with a predetermined ion implantation dose, maintained at a predetermined temperature, and further exposed to electromagnetic radiation from an energy source. The second IC layer is configured to, based at least in part of being exposed to the ion implantation and the electromagnetic radiation, experience changes in the chemical composition of the second IC layer and transform the second IC layer.
Method of manufacturing an insulation layer on silicon carbide
A method of manufacturing an insulation layer on silicon carbide includes first preparing a surface of the silicon carbide, then forming a first part of the insulation layer on the surface at a temperature lower than 400 Celsius. Finally, a second part of the insulation layer is formed by depositing a dielectric film on the first part. The surface of the silicon carbide is illuminated by a light at a wavelength below and/or equal to 450 nm during and/or after the formation of the first part of the insulation layer.
MULTI-LAYER MASK AND METHOD OF FORMING SAME
A method includes forming a multi-layer mask over a dielectric layer. Forming the multi-layer mask includes forming a bottom layer over the dielectric layer. A first middle layer is formed over the bottom layer. The first middle layer includes a first silicon-containing material. The first silicon-containing material has a first content of SiCH.sub.3 bonds. A second middle layer is formed over the first middle layer. The second middle layer includes a second silicon-containing material. The second silicon-containing material has a second content of SiCH.sub.3 bonds less than the first content of SiCH.sub.3 bonds.
METHODS OF POST TREATING DIELECTRIC FILMS WITH MICROWAVE RADIATION
A method of post-treating a dielectric film formed on a surface of a substrate includes positioning a substrate having a dielectric film formed thereon in a processing chamber and exposing the dielectric film to microwave radiation in the processing chamber at a frequency between 5 GHz and 7 GHz.
DIELECTRIC GAP-FILLING PROCESS FOR SEMICONDUCTOR DEVICE
A semiconductor device and a method of forming the same are provided. The method includes forming a trench in a substrate. A liner layer is formed along sidewalls and a bottom of the trench. A silicon-rich layer is formed over the liner layer. Forming the silicon-rich layer includes flowing a first silicon precursor into a process chamber for a first time interval, and flowing a second silicon precursor and a first oxygen precursor into the process chamber for a second time interval. The second time interval is different from the first time interval. The method further includes forming a dielectric layer over the silicon-rich layer.
Method for forming a cross-linked layer
A method for forming on a substrate a cross-linked layer for directing the self-assembly of a self-assembling material is provided. The method including: (a) providing a structure having the substrate; (b) providing on the substrate a layer of a photo- and thermally cross-linkable substance which, when crosslinked, is suitable for directing the self-assembly of a self-assembling material; (d) photocrosslinking the cross-linkable substance partially; and (d) cross-linking the substance further thermally, thereby forming the cross-linked layer.
Method for forming semiconductor structure with high aspect ratio
A semiconductor structure and a method for forming the same are provided. The method includes forming a first insulation material layer in a portion of a trench between a first protruding structure and a second protruding structure over a substrate and performing a pre-treatment process on the first insulation material layer. The method further includes performing a first insulation material conversion process on the first insulation material layer and forming a second insulation material layer covering the first insulation material layer in the trench. In addition, a first distance between upper portions of the first protruding structure and the second protruding structure before performing the first insulation material conversion process is different from a second distance between the upper portions of the first protruding structure and the second protruding structure after performing the first insulation material conversion process.
ALKOXYSILACYCLIC OR ACYLOXYSILACYCLIC COMPOUNDS AND METHODS FOR DEPOSITING FILMS USING SAME
A method and composition for producing a porous low k dielectric film via chemical vapor deposition is provided. In one aspect, the method comprises the steps of: providing a substrate within a reaction chamber; introducing into the reaction chamber gaseous reagents including at least one structure-forming precursor comprising a alkoxysilacyclic or acyloxysilacyclic compound with or without a porogen; applying energy to the gaseous reagents in the reaction chamber to induce reaction of the gaseous reagents to deposit a preliminary film on the substrate, wherein the preliminary film contains the porogen, and the preliminary film is deposited; and removing from the preliminary film at least a portion of the porogen contained therein and provide the film with pores and a dielectric constant of 3.2 or less. In certain embodiments, the structure-forming precursor further comprises a hardening additive.
Thin film transistor including high-dielectric insulating thin film and method of fabricating the same
Disclosed are a thin film transistor including a substrate and a gate electrode, a gate insulating film, a semiconductor layer, a source electrode, and a drain electrode formed on the substrate and a method of fabricating the thin film transistor, wherein the gate insulating film is made of a high dielectric ternary material, A.sub.2-XB.sub.XO.sub.3, wherein A is any one selected from the group consisting of aluminum, silicon, gallium, germanium, neodymium, gadolinium, vanadium, lutetium, and actinium, B is any one selected from the group consisting of yttrium, lanthanum, zirconium, hafnium, tantalum, titanium, vanadium, nickel, silicon, and ytterbium, and A is an element different from B. The gate insulating film may be formed through a solution process, and a high-quality insulating film may be obtained through heat treatment at low temperature.