Embodiments disclosed herein relate generally to forming a gate layer in high aspect ratio trenches using a cyclic deposition-etch process. In an embodiment, a method for semiconductor processing is provided. The method includes performing a first deposition process to form a conformal film over a bottom surface and along sidewall surfaces of a feature on a substrate. The method includes performing an etch process to remove a portion of the conformal film. The method includes repeating the first deposition process and the etch process to fill the feature with the conformal film. The method includes exposing the conformal film to ultraviolet light.

A semiconductor device includes a gate structure on a substrate, an offset spacer adjacent to the gate structure, a main spacer around the offset spacer, a source/drain region adjacent to two sides of the main spacer, a contact etch stop layer (CESL) adjacent to the main spacer, and an interlayer dielectric (ILD) layer around the CESL. Preferably, a dielectric constant of the offset spacer is higher than a dielectric constant of the main spacer.

A method of fabricating a dielectric film includes depositing a first precursor on a substrate. The first precursor includes a cyclic carbosiloxane group comprising a six-membered ring. The method also includes depositing a second precursor on the substrate. The first precursor and the second precursor form a preliminary film on the substrate, and the second precursor includes silicon, carbon, and hydrogen. The method further includes exposing the preliminary film to energy from an energy source to form a porous dielectric film.

A process for manufacturing interconnect BEOL structures from a patternable low-k dielectric on a microcircuit substrate having an optional anti-reflective coating comprises applying to the microcircuit substrate a via coating for forming a via comprising a low-k patternable dielectric coating, exposing the via coating to a via pattern, developing the exposed via coating, curing the exposed and developed via coating to form a via film, applying a trench coating for forming a trench comprising a patternable low-k dielectric coating, exposing the trench coating to a trench pattern, developing the exposed and developed trench coating, followed by curing the trench coating to form a trench film; Curing one of the uncured coatings to form a film prevents it from inter-mixing with the other applied uncured coating. Articles of manufacture comprise products made by this process as well as dual-damascene integrated spun-on patterned low-k dielectrics, and single-damascene integrated spun-on patterned low-k dielectrics.

Implementations disclosed herein relate to methods for forming and filling trenches in a substrate with a flowable dielectric material. In one implementation, the method includes subjecting a substrate having at least one trench to a deposition process to form a flowable layer over a bottom surface and sidewall surfaces of the trench in a bottom-up fashion until the flowable layer reaches a predetermined deposition thickness, subjecting the flowable layer to a first curing process, the first curing process being a UV curing process, subjecting the UV cured flowable layer to a second curing process, the second curing process being a plasma or plasma-assisted process, and performing sequentially and repeatedly the deposition process, the first curing process, and the second curing process until the plasma cured flowable layer fills the trench and reaches a predetermined height over a top surface of the trench.

A technique for obtaining good film quality in forming a silicon-oxide-containing insulating film as a coating film on a substrate. A coating liquid containing polysilazane is applied to a wafer, a solvent in the coating liquid is volatilized, and then the coating film is irradiated with ultraviolet rays under a nitrogen atmosphere before performing a curing process. Thus, dangling bonds are likely to be formed at hydrolyzed portions in polysilazane. Since dangling bonds are formed in advance at portions in silicon to be hydrolyzed, productivity of hydroxyl groups is enhanced. That is, since an energy required for hydrolysis is reduced, the number of the portions remaining without being hydrolyzed is reduced even when the curing process is performed at a low temperature. Therefore, dehydration synthesis occurs efficiently, which increases a crosslinking rate and makes it possible to form a dense (good film quality) insulating film.

A compound semiconductor device includes a compound semiconductor stack structure, a protective film provided on the compound semiconductor stack structure and containing titanium oxide, and a polycrystalline diamond film provided on the protective film.

A semiconductor device includes: a semiconductor layer; a first insulating film which covers a surface of the semiconductor layer; a first adhering film which is formed on a surface of the first insulating film and contains a carbonyl group; and a second insulating film which covers a surface of the first adhering film and has a lower dielectric constant than the first insulating film.

Embodiments described herein provide a method of forming a silicon-and-oxygen-containing layer having covalent SiOSi bonds by cross-linking terminal silanol groups. The method includes positioning a substrate in a chamber. The substrate has one or more trenches including a width of 10 nanometers (nm) or less, and an aspect ratio of 2:1 or greater. The aspect ratio is defined by a ratio of a depth to the width of the one or more trenches. A silicon-and-oxygen-containing layer is disposed over the one or more trenches. The silicon-and-oxygen-containing layer has terminal silanol groups. The substrate is heated, and the silicon-and-oxygen-containing layer is exposed to an ammonia or amine group-containing precursor distributed across a process volume.

A method for forming ultraviolet (UV) radiation responsive metal-oxide containing film is disclosed. The method may include, depositing an UV radiation responsive metal oxide-containing film over a substrate by, heating the substrate to a deposition temperature of less than 400 C., contacting the substrate with a first vapor phase reactant comprising a metal component, a hydrogen component, and a carbon component, and contacting the substrate with a second vapor phase reactant comprising an oxygen containing precursor, wherein regions of the UV radiation responsive metal oxide-containing film have a first etch rate after UV irradiation and regions of the UV radiation responsive metal oxide-containing film not irradiated with UV radiation have a second etch rate, wherein the second etch rate is different from the first etch rate.