H01L21/02351

Silicon Compounds and Methods for Depositing Films Using Same

A chemical vapor deposition method for producing a dielectric film, the method comprising: providing a substrate into a reaction chamber; introducing gaseous reagents into the reaction chamber wherein the gaseous reagents comprise a silicon precursor comprising an silicon compound having Formula I as defined herein and applying energy to the gaseous reagents in the reaction chamber to induce reaction of the gaseous reagents to deposit a film on the substrate. The film as deposited is suitable for its intended use without an optional additional cure step applied to the as-deposited film.

ALTERING OPERATIONAL CHARACTERISTICS OF A SEMICONDUCTOR DEVICE USING ACCELERATED IONS
20240105419 · 2024-03-28 ·

Embodiments described herein may be related to apparatuses, processes, systems, and/or techniques for altering an operational characteristic of a semiconductor device by exposing one or more locations within the semiconductor device to a focused ion beam. In embodiments, the ions in the focused ion beam may be light-element ions, which may include helium ions or neon ions. Other embodiments may be described and/or claimed.

SYSTEM AND METHOD FOR RADICAL AND THERMAL PROCESSING OF SUBSTRATES

The present disclosure provides systems and methods for processing channel structures of substrates that include positioning the substrate in a first processing chamber having a first processing volume. The substrate includes a channel structure with high aspect ratio features having aspect ratios greater than about 20:1. The method includes forming a silicon-containing layer over the channel structure to a hydrogen-or-deuterium plasma in the first processing volume at a flow rate of about 10 sccm to about 5000 sccm. The substrate is maintained at a temperature of about 100 C. to about 1100 C. during the exposing, the exposing forming a nucleated substrate. Subsequent to the exposing a thermal anneal operation is performed on the substrate.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
20240047200 · 2024-02-08 · ·

A semiconductor device is disclosed in which proton implantation is performed a plurality of times to form a plurality of n-type buffer layers in an n-type drift layer at different depths from a rear surface of a substrate. The depth of the n-type buffer layer, which is provided at the deepest position from the rear surface of the substrate, from the rear surface of the substrate is more than 15 m. The temperature of a heat treatment which is performed in order to change a proton into a donor and to recover a crystal defect after the proton implantation is equal to or higher than 400 C. In a carrier concentration distribution of the n-type buffer layer, a width from the peak position of carrier concentration to an anode is more than a width from the peak position to a cathode.

Amorphous layers for reducing copper diffusion and method forming same

A method includes depositing an etch stop layer over a first conductive feature, performing a first treatment to amorphize the etch stop layer, depositing a dielectric layer over the etch stop layer, etching the dielectric layer to form an opening, etching-through the etch stop layer to extend the opening into the etch stop layer, and filling the opening with a conductive material to form a second conductive feature.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
20190115211 · 2019-04-18 ·

A semiconductor device is disclosed in which proton implantation is performed a plurality of times to form a plurality of n-type buffer layers in an n-type drift layer at different depths from a rear surface of a substrate. The depth of the n-type buffer layer, which is provided at the deepest position from the rear surface of the substrate, from the rear surface of the substrate is more than 15 m.

Semiconductor device and method for manufacturing the same
10176986 · 2019-01-08 · ·

A semiconductor device is disclosed in which proton implantation is performed a plurality of times to form a plurality of n-type buffer layers in an n-type drift layer at different depths from a rear surface of a substrate. The depth of the n-type buffer layer, which is provided at the deepest position from the rear surface of the substrate, from the rear surface of the substrate is more than 15 m. The temperature of a heat treatment which is performed in order to change a proton into a donor and to recover a crystal defect after the proton implantation is equal to or higher than 400 C. In a carrier concentration distribution of the n-type buffer layer, a width from the peak position of carrier concentration to an anode is more than a width from the peak position to a cathode.

MITIGATION OF SADDLE DEFORMATION OF SUBSTRATES USING FILM DEPOSITION AND EDGE ION IMPLANTATION

Disclosed systems and techniques are directed to correct an out-of-plane deformation (OPD) of a substrate. The techniques include obtaining, using optical inspection data, a profile of the out-of-plane deformation of the substrate and identifying, using the obtained profile, one or more parameters characterizing a saddle-shaped stress of the substrate. The techniques further include computing, using the one or more identified parameters, one or more characteristics of a stress-compensation layer (SCL) for the substrate and causing the SCL to be deposited on the substrate. The techniques further include causing a stress-mitigation beam to be applied to a plurality of edge regions of the SCL, wherein settings of the stress-mitigation beam are determined using the one or more identified parameters.

STRESS MANAGEMENT FOR PRECISE SUBSTRATE -TO- SUBSTRATE BONDING

Disclosed systems and techniques are directed to mitigating stresses in substrate-to-substrate bonding processes. Disclosed techniques include obtaining a first substrate supporting transferred feature(s) (TFs) and transferring TFs from the first substrate to a second substrate, transferring TFs from the first substrate to the second substrate, and applying stress mitigation to a target substrate. The target substrate can be the first substrate, an auxiliary substrate supporting TFs prior to transferring TFs from the auxiliary substrate to the first substrate, or the second substrate. Applying stress mitigation to the target substrate includes obtaining an out-of-plane deformation (OPD) profile of the target substrate, causing a stress compensation layer (SCL) to be deposited on the target substrate, and exposing the SCL to a stress-mitigation beam. Settings of the SCL and/or the stress-mitigation beam are determined using the OPD profile of the target substrate.

OPTIMIZED FILM DEPOSITION AND ION IMPLANTATION FOR MITIGATION OF STRESS AND DEFORMATION IN SUBSTRATES

Disclosed systems and techniques are directed to correct an out-of-plane deformation (OPD) of a substrate (e.g., wafer) by identifying, using optical inspection data, a profile of the OPD of the substrate and performing a polynomial decomposition of the profile to determine polynomial coefficients characterizing elemental deformation shapes of the substrate. The techniques further include identifying, based on the polynomial coefficients, characteristics of a stress-compensation layer (SCL) for the substrate and causing the SCL to be deposited on the substrate. The techniques further include performing statistical simulations to identify settings for a non-uniform stress-mitigation irradiation of the SCL, by sampling from one or more statistical distributions associated with previously performed stress-mitigation irradiations, and performing the non-uniform stress-mitigation irradiation of the SCL using the identified settings.