The present document discloses a semiconductor device structure (1) comprising a SiC substrate (11), an In.sub.x1Al.sub.y1Ga.sub.1-x1-y1N buffer layer (13), wherein x1=0-1, y1=0-1 and x1+y1=1, and an In.sub.x2Al.sub.y2Ga.sub.1-x2-y2N nucleation layer (12), wherein x2=0-1, y2=0-1 and x2+y2=1, sandwiched between the SiC substrate (11) and the buffer layer (13). The buffer layer (13) presents a rocking curve with a (102) peak having a FWHM below 250 arcsec, and the nucleation layer (12) presents a rocking curve with a (105) peak having a FWHM below 200 arcsec, as determined by X-ray Diffraction (XRD). Methods of making such a semiconductor device structure are disclosed.

The invention relates to methods for the chemical application of coatings by the decay of gaseous compounds, in particular to methods for injecting gases into a reaction chamber. The invention also relates to means for feeding gases into a reaction chamber, said means providing for the regulation of streams of reactive gases, and ensures the possibility of obtaining multi-layer epitaxial structures having set parameters and based on nitrides of group III metals while simultaneously increasing the productivity and cost-effectiveness of the process of the epitaxial growth thereof. Before being fed into a reactor, all of the gas streams are sent to a mixing chamber connected to the reactor, and are then fed into the reactor via a flux former under laminar flow conditions. The mixing chamber and the flux former are equipped with means for maintaining a set temperature. As a result of these solutions, a gaseous mixture with set parameters is fed into the reactor, and the formation of vortices is simultaneously prevented. The maximum allowable volume of the mixing chamber is chosen to take into account the process parameters and the required rarity of heterojunctions.

A wafer carrier includes a pocket sized and shaped to accommodate a wafer, the pocket having a base and a substantially circular perimeter, and a removable orientation marker, the removable orientation marker comprising an outer surface and an inner surface, the outer surface having an arcuate form sized and shaped to mate with the substantially circular perimeter of the pocket, and the inner surface comprising a flat face, wherein the removable orientation marker further comprises a notch at a first end of the flat face.

There is provided a method for manufacturing a nitride semiconductor template constituted by forming a nitride semiconductor layer on a substrate, comprising: (a) forming a first layer by epitaxially growing a nitride semiconductor containing aluminum on the substrate; (b) applying annealing to the first layer in an inert gas atmosphere; and (c) forming a second layer by epitaxially growing a nitride semiconductor containing aluminum on the first layer by a vapor phase growth after performing (b), and constituting the nitride semiconductor layer by the first layer and the second layer.

The present invention relates to a method for assembling molecules on the surface of a two-dimensional material formed on a substrate, the method comprises: forming a spacer layer comprising at least one of an electrically insulating compound or a semiconductor compound on the surface of the two-dimensional material, depositing molecules on the spacer layer, annealing the substrate with spacer layer and the molecules at an elevated temperature for an annealing time duration, wherein the temperature and annealing time are such that at least a portion of the molecules are allowed to diffuse through the spacer layer towards the surface of the two-dimensional material to assemble on the surface of the two-dimensional material. The invention also relates to an electronic device.

A nitride semiconductor substrate (11, 21) includes: a substrate (2); and an AlN-containing film (100, 200) provided above the substrate (2). A thickness of the AlN-containing film (100, 200) is at most 10000 nm, and a threading dislocation density of the AlN-containing film (100, 200) is at most 2×10.sup.8 cm.sup.−2.

A high electron mobility transistor comprising a nucleation layer having a first lattice constant, a back-barrier layer having a second lattice constant and a stress management layer having a third lattice constant which is larger than both first and second lattice constants. The stress management layer compensates some or all of the stress due to the lattice mismatch between the nucleation layer and back barrier layer so that the resulting structure experiences less bow and warp.

An n.sup.--type drift layer is an n.sup.--type epitaxial layer doped with nitrogen as an n-type dopant and is co-doped with aluminum as a p-type dopant, the n.sup.--type drift layer containing the nitrogen and aluminum substantially uniformly throughout. An n-type impurity concentration of the n.sup.--type drift layer is an impurity concentration determined by subtracting the aluminum concentration from the nitrogen concentration of the n.sup.--type drift layer; a predetermined blocking voltage is realized by the impurity concentration. A combined impurity concentration of the nitrogen and aluminum of the n.sup.--type drift layer is at least 3×10.sup.16/cm.sup.3.

A silicon carbide semiconductor device includes a silicon carbide (SiC) substrate having a SiC epitaxial layer disposed over a surface of the SiC substrate, the SiC substrate having a first conductivity and the SiC epitaxial layer having the first conductivity. A contact region and a well region are formed in the SiC epitaxial layer, the contact region and the well region have a doping level of a second conductivity opposite the first conductivity. The contact region lies completely within the well region, is not in contact with a region having the first conductivity and has edges recessed from edges of the well region.

Organosilicon chemistry, polymer derived ceramic materials, and methods. Such materials and methods for making polysilocarb (SiOC) and Silicon Carbide (SiC) materials having 3-nines, 4-nines, 6-nines and greater purity. Processes and articles utilizing such high purity SiOC and SiC.