A method of performing heteroepitaxy comprises exposing a substrate to a carrier gas, a first precursor gas, a Group II/III element, and a second precursor gas, to form a heteroepitaxial growth of one of GaAs, AlAs, InAs, GaP, InP, ZnSe, GaSe, CdSe, InSe, ZnTe, CdTe, GaTe, HgTe, GaSb, InSb, AlSb, CdS, GaN, and AlN on the substrate; wherein the substrate comprises one of GaAs, AlAs, InAs, GaP, InP, ZnSe, GaSe, CdSe, InSe, ZnTe, CdTe, GaTe, HgTe, GaSb, InSb, AlSb, CdS, GaN, and AlN; wherein the carrier gas is Hz, wherein the first precursor is HCl, the Group II/III element comprises at least one of Zn, Cd, Hg, Al, Ga, and In; and wherein the second precursor is one of AsH.sub.3 (arsine), PH.sub.3 (phosphine), H.sub.2Se (hydrogen selenide), H.sub.2Te (hydrogen telluride), SbH.sub.3 (hydrogen antimonide), H.sub.2S (hydrogen sulfide), and NH.sub.3 (ammonia). The process may be an HVPE (hydride vapor phase epitaxy) process.

Multiple strain states in epitaxial transistor channel material may be achieved through the incorporation of stress-relief defects within a seed material. Selective application of strain may improve channel mobility of one carrier type without hindering channel mobility of the other carrier type. A transistor structure may have a heteroepitaxial fin including a first layer of crystalline material directly on a second layer of crystalline material. Within the second layer, a number of defected regions of a threshold minimum dimension are present, which induces the first layer of crystalline material to relax into a lower-strain state. The defected regions may be introduced selectively, for example a through a masked impurity implantation, so that the defected regions may be absent in some transistor structures where a higher-strain state in the first layer of crystalline material is desired.

InGaN offers a route to high efficiency overall water splitting under one-step photo-excitation. Further, the chemical stability of metal-nitrides supports their use as an alternative photocatalyst. However, the efficiency of overall water splitting using InGaN and other visible light responsive photocatalysts has remained extremely low despite prior art work addressing optical absorption through band gap engineering. Within this prior art the detrimental effects of unbalanced charge carrier extraction/collection on the efficiency of the four electron-hole water splitting reaction have remained largely unaddressed. To address this growth processes are presented that allow for controlled adjustment and establishment of the appropriate Fermi level and/or band bending in order to allow the photochemical water splitting to proceed at high rate and high efficiency. Beneficially, establishing such material surface charge properties also reduces photo-corrosion and instability under harsh photocatalysis conditions.

A method for processing a substrate includes positioning a silicon substrate in a deposition chamber. One or more intermediate layers are deposited on a surface of the silicon. The one or more intermediate layers can include strontium, which combines with the silicon to form strontium silicide. Alternatively, the one or more intermediate layers comprise germanium. A layer of amorphous strontium titanate is deposited on the one or more intermediate layers in a transient environment in which oxygen pressure is reduced while temperature is increased. The substrate is then exposed to an oxidizing and annealing atmosphere that oxidizes the one or more intermediate layers and converts the layer of amorphous strontium titanate to crystalline strontium titanate.

A method of forming a semiconductor device may include depositing a NiAl layer on a substrate, oxidizing the NiAl layer to form a bilayer including a NiO semiconducting material layer and an AlO.sub.x layer on the NiO semiconducting material layer, forming a semiconductor layer including the NiO semiconducting material layer, the semiconductor layer also including a channel region, and forming a gate dielectric on the channel region of the semiconductor layer.

Organosilicon chemistry, polymer derived ceramic materials, and methods. Such materials and methods for making polysilocarb (SiOC) and Silicon Carbide (SiC) materials having 3-nines, 4-nines, 6-nines and greater purity. Processes and articles utilizing such high purity SiOC and SiC.

A substrate made of doped single-crystal silicon has an upper surface. A doped single-crystal silicon layer is formed by epitaxy on top of and in contact with the upper surface of the substrate. Either before or after forming the doped single-crystal silicon layer, and before any other thermal treatment step at a temperature in the range from 600° C. to 900° C., a denuding thermal treatment is applied to the substrate for several hours. This denuding thermal treatment is at a temperature higher than or equal to 1,000° C.

A wafer includes a substrate and at least one intermediate layer formed on a surface of the substrate. The at least one intermediate layer covers the surface of the substrate at least partially. An outer surface of the at least one intermediate layer is directed away from the surface of the substrate. The wafer further includes nanostructures grown on the outer surface of the at least one intermediate layer. The at least one intermediate layer is formed in such a way that positions of growth of the nanostructures are predetermined on the outer surface of the at least one intermediate layer. At least one nanostructure material of the nanostructures is assembled at the positions of growth of the nanostructures.

A semiconductor structure comprises a semiconductor substrate including a first silicon substrate component having a first crystalline orientation and a second silicon substrate component over the first silicon substrate and having a second crystalline orientation different from the first crystalline orientation. The semiconductor substrate defines a trench extending through the second silicon substrate component and at least partially within the first silicon substrate component. A gallium nitride structure is disposed within the trench of the semiconductor substrate.

A method of manufacturing nitride semiconductor substrate, comprising: providing silicon-on-insulator substrate which comprises an underlying silicon layer, a buried silicon dioxide layer and a top silicon layer; forming a first nitride semiconductor layer on the top silicon layer; forming, in the first nitride semiconductor layer, a plurality of notches which expose the top silicon layer; removing the top silicon layer and forming a plurality of protrusions and a plurality of recesses on an upper surface of the buried silicon dioxide layer, wherein each of the plurality of protrusions is in contact with the first nitride semiconductor layer, and there is a gap between each of the plurality of recesses and the first nitride semiconductor layer; and epitaxially growing a second nitride semiconductor layer on the first nitride semiconductor layer, such that the first nitride semiconductor layer and the second nitride semiconductor layer form a nitride semiconductor substrate.