Patent classifications
H01L21/02403
Semiconductor device and method for manufacturing the same
A semiconductor device is manufactured using a transistor in which an oxide semiconductor is included in a channel region and variation in electric characteristics due to a short-channel effect is less likely to be caused. The semiconductor device includes an oxide semiconductor film having a pair of oxynitride semiconductor regions including nitrogen and an oxide semiconductor region sandwiched between the pair of oxynitride semiconductor regions, a gate insulating film, and a gate electrode provided over the oxide semiconductor region with the gate insulating film positioned therebetween. Here, the pair of oxynitride semiconductor regions serves as a source region and a drain region of the transistor, and the oxide semiconductor region serves as the channel region of the transistor.
Method for manufacturing indium gallium nitride/gallium nitride quantum-well pyramid
A method for manufacturing an indium gallium nitride/gallium nitride quantum-well pyramid is provided to improve upon the complexity of the conventional method for manufacturing light-emitting diode die. The method for manufacturing an indium gallium nitride/gallium nitride quantum-well pyramid includes performing a first epitaxial reaction and then a second epitaxial reaction on a substrate under 600-650 C. to form a gallium nitride pyramid, growing an first indium gallium nitride layer on an end face of the gallium nitride pyramid, where the end face is away from the substrate, and growing a first gallium nitride layer on the first indium gallium nitride layer. A flux ratio of nitrogen to gallium of the first epitaxial reaction is 25:1-35:1, and a flux ratio of nitrogen to gallium of the second epitaxial reaction is 130:1-150:1.
CuO/Se COMPOSITE FILM
Disclosed is a CuO/Se composite film, in which Se with low melting point (221 C.) and strong photosensitivity is introduced into CuO, providing the film with fewer defects and excellent optical, electrical and photoelectric properties. In the preparation method of the invention, Se is introduced into CuO and melted by low-temperature annealing, and then the molten Se can infiltrate CuO to eliminate or reduce defects in the CuO film such as voids and dangling bonds, thereby improving optical, electrical and photoelectric properties of the film and overcoming the shortcomings that CuO has poor crystallinity, high melting point and is decomposed at a high temperature.
Semiconductor device
To suppress a change in electrical characteristics and to improve reliability in a semiconductor device using a transistor including an oxide semiconductor. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor film overlapping with the gate electrode, a gate insulating film which is between the gate electrode and the oxide semiconductor film and is in contact with a surface of the oxide semiconductor film, a protective film in contact with an opposite surface of the surface of the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film. In the gate insulating film or the protective film, the amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than the amount of nitrogen oxide released by heat treatment.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device and a method of manufacturing the semiconductor device are included. The method of manufacturing the semiconductor device includes forming a hafnium oxide layer on a substrate and crystallizing the hafnium oxide layer by using a hafnium cobalt oxide layer as a seed layer. According to the method of manufacturing the semiconductor device, a thin-film hafnium oxide layer may be easily crystallized.
Semiconductor device
To suppress a change in electrical characteristics and to improve reliability in a semiconductor device using a transistor including an oxide semiconductor. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor film overlapping with the gate electrode, a gate insulating film which is between the gate electrode and the oxide semiconductor film and is in contact with a surface of the oxide semiconductor film, a protective film in contact with an opposite surface of the surface of the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film. In the gate insulating film or the protective film, the amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than the amount of nitrogen oxide released by heat treatment.
STRUCTURE FOR PACKAGING AND METHOD FOR MANUFACTURING THE SAME
The present invention relates to a structure for packaging and the method for manufacturing the same. The structure for packaging comprise two or more metal members disposed on a substrate or a semiconductor device. A patterned layer and an insulation layer are disposed surrounding the metal members. There is a gap between the patterned layer and the insulation layer. Thereby, while bonding the metal members, metal spilling can be avoided, for further preventing the structure from short circuit or current leakage.
Method for producing composite wafer having oxide single-crystal film
Provided is a composite wafer (c-wafer) having an oxide single-crystal film transferred onto a support wafer (s-wafer), the film being a lithium tantalate or lithium niobate film, and c-wafer being unlikely to have cracking or peeling caused in the lamination interface between the film and s-wafer. More specifically, provided is a method of producing c-wafer, including steps of: implanting hydrogen atom ions or molecule ions from a surface of the oxide wafer (o-wafer) to form an ion-implanted layer inside thereof; subjecting at least one of the surface of o-wafer and a surface of s-wafer to surface activation; bonding the surfaces together to obtain a laminate; providing at least one of the surfaces of the laminate with a protection wafer having thermal expansion coefficient smaller than that of o-wafer; and heat-treating the laminate with the protection wafer at 80 C. or higher to split the laminate along the layer to obtain c-wafer.
Template-Assisted Synthesis of 2D Nanosheets Using Nanoparticle Templates
A template-assisted method for the synthesis of 2D nanosheets comprises growing a 2D material on the surface of a nanoparticle substrate that acts as a template for nanosheet growth. The 2D nanosheets may then be released from the template surface, e.g. via chemical intercalation and exfoliation, purified, and the templates may be reused.
METHOD FOR MANUFACTURING INDIUM GALLIUM NITRIDE/GALLIUM NITRIDE QUANTUM-WELL PYRAMID
A method for manufacturing an indium gallium nitride/gallium nitride quantum-well pyramid is provided to improve upon the complexity of the conventional method for manufacturing light-emitting diode die. The method for manufacturing an indium gallium nitride/gallium nitride quantum-well pyramid includes performing a first epitaxial reaction and then a second epitaxial reaction on a substrate under 600-650 C. to form a gallium nitride pyramid, growing an first indium gallium nitride layer on an end face of the gallium nitride pyramid, where the end face is away from the substrate, and growing a first gallium nitride layer on the first indium gallium nitride layer. A flux ratio of nitrogen to gallium of the first epitaxial reaction is 25:1-35:1, and a flux ratio of nitrogen to gallium of the second epitaxial reaction is 130:1-150:1.