H01L21/02444

Epitaxial base

An epitaxial base is provided. The epitaxial base includes a substrate and a carbon nanotube layer. The substrate has an epitaxial growth surface and defines a plurality of grooves and bulges on the epitaxial growth surface. The carbon nanotube layer covers the epitaxial growth surface, wherein a first part of the carbon nanotube layer attached on top surface of the bulges, and a second part of the carbon nanotube layer attached on bottom surface and side surface of the grooves.

Carrier for a semiconductor structure

A support for a semiconductor structure includes a charge-trapping layer on a base substrate. The charge-trapping layer consists of a polycrystalline main layer and, interposed in the main layer or between the main layer and the base substrate, at least one intermediate polycrystalline layer composed of a silicon and carbon alloy or carbon. The intermediate layer has a resistivity greater than 1000 ohm.Math.cm.

COMPOUND SEMICONDUCTOR DEVICE STRUCTURES COMPRISING POLYCRYSTALLINE CVD DIAMOND

A semiconductor device structure includes a layer of single crystal compound semiconductor material; and a layer of polycrystalline CVD diamond material. The layer of polycrystalline CVD diamond material is bonded to the layer of single crystal compound semiconductor material via a bonding layer having a thickness of less than 25 nm and a thickness variation of no more than 15 nm. The effective thermal boundary resistance as measured by transient thermoreflectance at an interface between the layer of single crystal compound semiconductor material and the layer of polycrystalline CVD diamond material is less than 25 m.sup.2K/GW with a variation of no more than 12 m.sup.2K/GW as measured across the semiconductor device structure. The layer of single crystal compound semiconductor material has one or both of the following characteristics: a charge mobility of at least 1200 cm.sup.2V.sup.−1s.sup.−1; and a sheet resistance of no more than 700 Ω/square.

Semiconductor device, superconducting device, and manufacturing method of semiconductor device

A semiconductor device of an embodiment includes a layered substance formed by laminating two-dimensional substances in two or more layers. The layered substance includes at least either one of a p-type region having a first intercalation substance between layers of the layered substance and an n-type region having a second intercalation substance between layers of the layered substance. The layered substance includes a conductive region that is adjacent to at least either one of the p-type region and the n-type region. The conductive region includes neither the first intercalation substance nor the second intercalation substance. A sealing member is formed on the conductive region, or on the conductive region and an end of the layered substance.

COMPOUND SEMICONDUCTOR DEVICE STRUCTURES COMPRISING POLYCRYSTALLINE CVD DIAMOND

A semiconductor device structure comprising: a layer of compound semiconductor material; and a layer of polycrystalline CVD diamond material, wherein the layer of polycrystalline CVD diamond material is bonded to the layer of compound semiconductor material via a layer of nano-crystalline diamond which is directly bonded to the layer of compound semiconductor material, the layer of nano-crystalline diamond having a thickness in a range 5 to 50 nm and configured such that an effective thermal boundary resistance (TBR.sub.eff) as measured by transient thermoreflectance at an interface between the layer of compound semiconductor material and the layer of polycrystalline CVD diamond material is no more than 50 m.sup.2K/GW.

Gallium Nitride Growth on Silicon

Systems and methods for gallium nitride growth on silicon. A semiconductor device, comprising a silicon (001) substrate. A graphene layer on the silicon (001) substrate, wherein the graphene layer is synthesized without a metallic catalyst, and a gallium nitride-based layer over the graphene layer. Methods for growing a gallium nitride layer on silicon are also taught.

STACK, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING STACK

A stack includes a base portion consisting of silicon carbide and having a first surface that is a Si face and a carbon atom thin film disposed on the first surface and including a first main surface facing the first surface and a second main surface that is a main surface on an opposite side from the first main surface. The carbon atom thin film consists of carbon atoms. The carbon atom thin film includes at least one of a buffer layer that is a carbon atom layer including carbon atoms bonded to silicon atoms forming the Si face and a graphene layer. The second main surface includes a plurality of terraces parallel to the Si face of the silicon carbide forming the base portion and a plurality of steps connecting together the plurality of terraces.

Diamond Semiconductor System And Method
20210384032 · 2021-12-09 ·

Disclosed herein is a new and improved system and method for fabricating monolithically integrated diamond semiconductor. The method may include the steps of seeding the surface of a substrate material, forming a diamond layer upon the surface of the substrate material; and forming a semiconductor layer within the diamond layer, wherein the diamond semiconductor of the semiconductor layer has n-type donor atoms and a diamond lattice, wherein the donor atoms contribute conduction electrons with mobility greater than 770 cm.sup.2/Vs to the diamond lattice at 100 kPa and 300K, and Wherein the n-type donor atoms are introduced to the lattice through ion tracks.

METHOD FOR PRODUCING TRANSITION METAL DICHALCOGENIDEGRAPHENE HETERO JUNCTION COMPOSITE USING PLASMA

A method for producing a transition metal dichalcogenide-graphene heterojunction composite, the method includes: transferring a graphene onto a flexible substrate; depositing a transition metal layer on the flexible substrate onto which the graphene has been transferred; and injecting a gas containing plasma-treated sulfur (S) onto the flexible substrate onto which the transition metal layer has been deposited, is disclosed.

CARBON CVD DEPOSITION METHODS TO MITIGATE STRESS INDUCED DEFECTS

A method includes flowing a carbon-containing precursor and a carrier gas into a processing volume having a substrate positioned therein, generating a plasma in the processing volume by applying a first RF bias to a substrate support to deposit a first portion of carbon film onto the substrate, and terminating flow of the carbon-containing precursor while maintaining flow of the carrier gas to maintain the plasma within the processing volume. The method also includes flowing a nitrogen-containing gas into the processing volume and ionizing the nitrogen-containing gas in the presence of the plasma, exposing the substrate having the carbon film thereon to the ionized nitrogen-containing gas for a time period less than three seconds, and terminating flow of the nitrogen-containing gas while maintaining the plasma and reintroducing the carbon-containing precursor into the processing volume in the presence of the plasma to deposit a second portion of the carbon film.